KSZ8462HL Datasheet, PDF (205/279 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled Two-Port 10/100Mb/s Ethernet Switch with 8 or 16 Bit Host Interface

Micrel, Inc.
KSZ8462HL/KSZ8462FHL
Wake-Up Frame 2 Byte Mask 0 Register (0x154 – 0x155): WF2BM0
This register contains the first 16 bytes mask values of the Wake-Up frame 2 pattern. Setting bit [0] selects the first byte
of the Wake-Up frame 2, setting bit [15] selects the 16th byte of the Wake-Up frame 2.
Bit
15−0
Default Value
0x0000
R/W Description
WF2BM0
RW
Wake−Up frame 2 Byte Mask 0. The first 16 byte mask of a Wake−up frame 2 pattern.
Wake-Up Frame 2 Byte Mask 1 Register (0x156 – 0x157): WF2BM1
This register contains the next 16 bytes mask values of the Wake-Up frame 2 pattern. Setting bit [0] selects the 17th byte
of the Wake-Up frame 2. Setting bit [15] selects the 32nd byte of the Wake-Up frame 2.
Bit
15−0
Default Value
0x0000
R/W Description
WF2BM1
RW _{Wake−Up frame 2 Byte Mask 1. The next 16 byte mask covering bytes 17 to 32 of a Wake−Up}
frame 2 pattern.
Wake-Up Frame 2 Byte Mask 2 Register (0x158 – 0x159): WF2BM2
This register contains the next 16 bytes mask values of the Wake-Up frame 2 pattern. Setting bit [0] selects the 33rd byte
of the Wake-Up frame 2. Setting bit [15] selects the 48th byte of the Wake-Up frame 2.
Bit
15−0
Default Value
0x0000
R/W Description
WF2BM2
RW _{Wake−Up frame 2 Byte Mask 2. The next 16 byte mask covering bytes 33 to 48 of a Wake−Up}
frame 2 pattern.
Wake-Up Frame 2 Byte Mask 3 Register (0x15A – 0x15B): WF2BM3
This register contains the last 16 bytes mask values of the Wake-Up frame 2 pattern. Setting bit [0] selects the 49th byte
of the Wake-Up frame 2. Setting bit [15] selects the 64th byte of the Wake-Up frame 2.
Bit
15−0
Default Value
0x0000
R/W Description
WF2BM3
RW _{Wake−Up frame 2 Byte Mask 3. The last 16 byte mask covering bytes 49 to 64 of a Wake−Up}
frame 2 pattern.
0x15C – 0x15F: Reserved
June 11, 2014
205
Revision 1.0