KSZ8462HL Datasheet, PDF (136/279 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled Two-Port 10/100Mb/s Ethernet Switch with 8 or 16 Bit Host Interface

Micrel, Inc.
KSZ8462HL/KSZ8462FHL
Indirect Access Data Register 5 (0x02E – 0x02F): IADR5
This register is used to indirectly read or write the data in the Management Information Base (MIB) Counters, Static MAC
Address Table, Dynamic MAC Address Table, or the VLAN Table.
Bit
15−0
Default
0x0000
R/W Description
Indirect Data [31:16]
RW
Bits [31:16] of indirect data.
Indirect Access Control Register (0x030 – 0x031): IACR
This register is used to indirectly read or write the data in the Management Information Base (MIB) Counters, Static MAC
Address Table, Dynamic MAC Address Table, or the VLAN Table. Writing to IACR triggers a command. Read or write
access is determined by register bit [12].
Bit
15−13
12
11−10
9−0
Default
000
0
00
0x000
R/W Description
RW Reserved
Read or Write Access Selection
RW 1 = Read cycle.
0 = Write cycle.
Table Select
00 = Static MAC address table selected.
RW 01 = VLAN table selected.
10 = Dynamic MAC address table selected.
11 = MIB counter selected.
Indirect Address [9:0]
RW
Bits [9:0] of indirect address.
June 11, 2014
136
Revision 1.0