KSZ8462HL Datasheet, PDF (127/279 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled Two-Port 10/100Mb/s Ethernet Switch with 8 or 16 Bit Host Interface

Micrel, Inc.
KSZ8462HL/KSZ8462FHL
Switch Global Control Register 7 (0x00E – 0x00F): SGCR7
This register contains global control bits for the switch function.
Bit
15−10
Default
0x02
R/W Description
R/W Reserved
Port LED Mode
When read, these two bits provide the current setting of the LED display mode for P1/2LED1 and
P1/2LED0 as defined as below. Reg. 0x06C – 0x06D, bits[14:12] determine if this automatic
functionality is utilized or if the port 1 LEDs are controlled by the local processor. Reg. 0x084 – 0x085,
bits[14:12] determine if this automatic functionality is utilized or if the port 2 LEDs are controlled by the
host processor.
9−8
00
R/W
LED Mode P1/2LED1
P1/2LED0
00
Speed
Link & Activity
01
Activity
Link
10
Full Duplex Link & Activity
11
Full Duplex Link
Unknown Default Port Enable
7
0
R/W Send packets with unknown destination address to specified ports in bits[2:0].
1 = Enable to send unknown DA packet
Driver Strength Selection
These two bits determine the drive strength of all I/O pins except for the following category of pins:
LED pins, GPIO pins, INTRN, and RSTN.
6−5
01 or 10 R/W ^{00 = 4mA.}
01 = 8mA. (Default when VDD_IO is 3.3V or 2.5V)
10 = 12mA. (Default when VDD_IO is 1.8V)
11 = 16mA.
4−3
00
R/W Reserved
Unknown Packet Default Port(s)
Specify which ports to send packets with unknown destination addresses. Feature is enabled by bit
[7].
2−0
111
R/W
Bit[2] = For port 3 (host port)
Bit[1] = For port 2
Bit[0] = For port 1
June 11, 2014
127
Revision 1.0