KSZ8462HL Datasheet, PDF (257/279 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled Two-Port 10/100Mb/s Ethernet Switch with 8 or 16 Bit Host Interface

Micrel, Inc.
KSZ8462HL/KSZ8462FHL
Management Information Base (MIB) Counters
The KSZ8462 provides 34 MIB counters for each port. These counters are used to monitor the port activity for network
management. The MIB counters are formatted “per port” and “all ports dropped packet” as shown in Table 24.
Table 24. Format of Per-Port MIB Counters
Bit
Name
R/W
31
Overflow
RO
30
Count valid
RO
29−0 Counter values
RO
Description
1 = Counter overflow.
0 = No counter overflow.
1 = Counter value is valid.
0 = Counter value is not valid.
Counter value (read clear)
Default
0
0
0x00000000
“Per-port” MIB counters are read using indirect memory access. The base address offsets and address ranges for all
three ports are:
• Port 1 base address is 0x00 and range is from 0x00 to 0x1F.
• Port 2 base address is 0x20 and range is from 0x20 to 0x3F.
• Port 3 base address is 0x40 and range is from 0x40 to 0x5F.
Per-port MIB counters are read using indirect access control in the IACR register and the indirect access data registers in
IADR4[15:0], IADR5[31:16] (0x02C – 0x02F). The port 1 MIB counters address memory offset as shown in Table 25.
June 11, 2014
257
Revision 1.0