MAX1126 Datasheet, PDF (14/25 Pages) Maxim Integrated Products – Quad, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs

Quad, 12-Bit, 40Msps, 1.8V ADC with
Serial LVDS Outputs
Typical Operating Characteristics (continued)
(AV_DD = 1.8V, OV_DD = 1.8V, CV_DD = 1.8V, GND = 0, external V_REFIO = 1.24V, INTREF = AV_DD, differential input at -0.5dBFS,
f_CLK = 40MHz (50% duty cycle), DT = low, C_LOAD = 10pF, T_A = +25°C, unless otherwise noted.)
INTERNAL REFERENCE VOLTAGE
vs. SUPPLY VOLTAGE
1.239
INTERNAL REFERENCE VOLTAGE
vs. TEMPERATURE
1.26
INTERNAL REFERENCE VOLTAGE
vs. REFERENCE LOAD CURRENT
1.40
NEGATIVE CURRENT
1.35 FLOWS INTO REFIO
1.238
1.25
1.30
1.25
1.237
1.24
1.20
1.15
1.236
1.23
1.10
AV_DD = OV_DD
1.235
1.7
1.8
1.9
2.0
2.1
SUPPLY VOLTAGE (V)
AV_DD = OV_DD
1.22
-40 -15
10
35
60
85
TEMPERATURE (°C)
1.05
1.00
-400 -300 -200 -100 0 100 200 300 400
I_REFIO (µA)
PIN
1, 4, 7, 11,
14, 17, 22,
24, 65, 68
2
3
5
6
8, 9, 10, 18,
20, 25, 26,
27, 58–62
12
13
15
16
19
21
23
28
NAME
FUNCTION
Pin Description
GND
Ground. Connect all GND pins to the same potential.
IN0P
IN0N
IN1P
IN1N
AV_DD
IN2P
IN2N
IN3P
IN3N
I.C.
CV_DD
CLK
DT
Channel 0 Positive Analog Input
Channel 0 Negative Analog Input
Channel 1 Positive Analog Input
Channel 1 Negative Analog Input
Analog Power Input. Connect AV_DD to a 1.7V to 1.9V power supply. Bypass each AV_DD to GND with
a 0.1µF capacitor as close to the device as possible. Bypass the AV_DD power plane to the GND
ground plane with a bulk ≥2.2µF capacitor as close to the device as possible. Connect all AV_DD pins
to the same potential.
Channel 2 Positive Analog Input
Channel 2 Negative Analog Input
Channel 3 Positive Analog Input
Channel 3 Negative Analog Input
Internally Connected. Do not connect.
Clock Power Input. Connect CV_DD to a 1.7V to 3.6V supply. Bypass CV_DD to GND with a 0.1µF
capacitor in parallel with a ≥2.2µF capacitor. Install the bypass capacitors as close to the device as
possible.
Single-Ended CMOS Clock Input
Double Termination Select Input. Drive DT high to select the internal 100Ω termination between the
differential output pairs. Drive DT low to select no internal output termination.
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