LTC3577-4_15 Datasheet, PDF (5/52 Pages) Linear Technology – Highly Integrated Portable Product PMIC

LTC3577-3/LTC3577-4
ELECTRICAL CHARACTERISTICS Power Manager. The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T_A = 25°C. V_BUS = 5V, V_BAT = 3.8V, I_LIM0 = I_LIM1 = 5V, WALL = 0V,
V_INLDO2 = V_INLOD1 = V_IN12 = V_IN3 = V_OUT, R_PROG = 2k, R_CLPROG = 2.1k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NTC, Battery Discharge Protection
V_COLD
V_HOT
V_TOO__HOT
Cold Temperature Fault Threshold
Voltage
Hot Temperature Fault Threshold
Voltage
NTC Discharge Threshold Voltage
Rising NTC Voltage
Hysteresis
Falling NTC Voltage
Hysteresis
Falling NTC Voltage
Hysteresis
75
76
77
%V_NTCBIAS
1.3
%V_NTCBIAS
34
35
36
%V_NTCBIAS
1.3
%V_NTCBIAS
24.5
25.5
26.5 %V_NTCBIAS
50
mV
I_NTC
I_BAT2HOT
V_BAT2HOT
Ideal Diode
NTC Leakage Current
BAT Discharge Current
BAT Discharge Threshold
V_NTC = V_BUS = 5V
V_BAT = 4.1V, NTC < V_{TOO_HOT}
I_BAT < 0.1mA, NTC < V_{TOO_HOT}
–50
50
nA
170
mA
3.9
V
V_FWD
Forward Voltage Detection
R_DROPOUT
Diode On-Resistance, Dropout
I_MAX
Diode Current Limit
Overvoltage Protection
I_OUT = 10mA
I_OUT = 200mA
(Note 7)
5
15
25
mV
200
mΩ
3.6
A
V_OVCUTOFF
V_OVGATE
Overvoltage Protection Threshold
OVGATE Output Voltage
I_OVSENSQ
OVSENS Quiescent Current
t_RISE
OVGATE Time to Reach Regulation
Wall Adapter and High Voltage Buck Output Control
V_ACPR
ACPR Pin Output High Voltage
ACPR Pin Output Low Voltage
V_W
Absolute Wall Input Threshold Voltage
ΔV_W
I_QWALL
Differential Wall Input Threshold
Voltage
Wall Operating Quiescent Current
Logic (I_LIM0, I_LIM1 and CHRG)
V_IL
Input Low Voltage
V_IH
Input High Voltage
I_PD
V_CHRG
I_CHRG
Static Pull-Down Current
CHRG Pin Output Low Voltage
CHRG Pin Input Current
Rising Threshold, R_OVSENS = 6.2k
Input Below V_OVCUTOFF
Input Above V_OVCUTOFF
V_OVSENS = 5V
C_OVGATE = 1nF
I_ACPR = 0.1mA
I_ACPR = 1mA
V_WALL Rising
V_WALL Falling
V_WALL – V_BAT Falling
V_WALL – V_BAT Rising
I_WALL + I_VOUT, I_BAT = 0mA,
WALL = V_OUT = 5V
I_LIM0, I_LIM1
I_LIM0, I_LIM1
I_LIM0, I_LIM1; V_PIN = 1V
I_CHRG = 10mA
V_BAT = 4.5V, V_CHRG = 5V
6.10
6.35
6.70
V
1.88 • V_OVSENS 12
V
0
V
40
μA
2.5
ms
V_OUT – 0.3 V_OUT
V
0
0.3
V
4.3
4.45
V
3.1
3.2
V
0
25
mV
75
100
mV
440
μA
0.4
V
1.2
V
2
μA
0.15
0.4
V
0
1
μA
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