LTC3577-4_15 Datasheet, PDF(44/52 Page) Linear Technology – Highly Integrated Portable Product PMIC

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LTC3577-4_15 Datasheet, PDF (44/52 Pages) Linear Technology – Highly Integrated Portable Product PMIC

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LTC3577-3/LTC3577-4

OPERATION

Power Down via Pushbutton Timing

The timing diagram, Figure 16, shows the LTC3577-3/

LTC3577-4 powering down by Î¼C/Î¼P control. For this ex-

ample the pushbutton circuitry starts in the PON state with

VOUT not in UVLO and Buck1, Buck2 and LDO2 enabled.

In this case the pushbutton is applied (ON low) for at least

50ms, which generates a low impedance on the PBSTAT

output. After receiving the PBSTAT the Î¼C/Î¼P will drive

the PWR_ON input low. 50ms after PWR_ON goes low

the pushbutton circuitry will enter the PDN state. Buck1,

Buck2 and LDO2 are disabled together upon entering the

PDN state. After entering the PDN state, a 1 second wait

time is initiated before entering the POFF state. During

this 1 second time ON and PWR_ON inputs are ignored

to allow all LTC3577-3/LTC3577-4 generated supplies to

go low.

Upon entering the PDN state Buck3 is disabled and LED

backlight I2C registers are cleared effectively disabling the

backlight. The LED backlight can be disabled via I2C prior

to entering the PDN state if desired.

Holding ON low through the 1 second power-down period

will not cause a power-up event at end of the 1 second

period. The ON input must be brought high following the

power-down event and then go low again to establish a

valid power-up event.

VOUT UVLO

ON (PB)

PBSTAT

PWR_ON

BUCK1

50ms

Î¼C/Î¼P CONTROL

50ms

1 SEC

BUCK2

LDO2

PGOOD

STATE

PON

PDN

Figure 16. Power-Down via Pushbutton

POFF

35773 F16

VOUT UVLO Power-Down Timing

If VOUT drops below the VOUT UVLO threshold, the push-

button circuitry will transition from the PON state to the

PDN state. Buck1, Buck2 and LDO2 are disabled together

upon entering the PDN state. After entering the PDN state,

a 1 second wait time is initiated before entering the POFF

state. During this 1 second time ON and PWR_ON inputs

are ignored to allow all LTC3577-3/LTC3577-4 generated

supplies to go low.

Upon entering the PDN state the Buck3 is disabled and

LED backlight I2C registers are cleared effectively disabling

the backlight. LDO1 is also disabled by the VOUT UVLO

and stays disabled as long as the VOUT UVLO condition

remains. Note that it is not possible to sequence any of

the supplies up while the VOUT UVLO condition exists.

LDO1 will be re-enabled when the VOUT UVLO condition

is removed. The other supplies will remain disabled until

a valid power-up pushbutton event takes place.