LTC3577-4_15 Datasheet, PDF (16/52 Pages) Linear Technology – Highly Integrated Portable Product PMIC

LTC3577-3/LTC3577-4
PIN FUNCTIONS
I_LIM0, I_LIM1 (Pins 1, 2): Input Current Control Pins. I_LIM0
and I_LIM1 control the input current limit. See Table 1 in the
“USB PowerPath Controller” section. Both pins are pulled
low by a weak current sink.
LED_FS (Pin 3): A resistor between this pin and ground
sets the full-scale output current of the I_LED pin.
WALL (Pin 4): Wall Adapter Present Input. Pulling this
pin above 4.3V will disconnect the power path from V_BUS
to V_OUT. The ACPR pin will also be pulled low to indicate
that a wall adapter has been detected.
SW3 (Pin 5): Power Transmission (Switch) Pin for Step-
Down Switching Regulator 3 (Buck3).
V_IN3 (Pin 6): Power Input for Step-Down Switching Regu-
lator 3. This pin should be connected to V_OUT.
FB3 (Pin 7): Feedback Input for Step-Down Switching
Regulator 3 (Buck3). This pin servos to a fixed voltage of
0.8V when the control loop is complete.
OVSENSE (Pin 8): Overvoltage Protection Sense Input.
OVSENSE should be connected through a 6.2k resistor
to the input power connector and the drain of an external
N-channel MOS pass transistor. When the voltage on
this pin exceeds a preset level, the OVGATE pin will be
pulled to GND to disable the pass transistor and protect
downstream circuitry.
LED_OV (Pin 9): A resistor between this pin and the boosted
LED backlight voltage sets the overvoltage limit on the
boost output. If the boost voltage exceeds the programmed
limit the LED boost converter will be disabled.
DV_CC (Pin 10): Supply Voltage for I²C Lines. This pin sets
the logic reference level of the LTC3577-3/LTC3577-4. A
UVLO circuit on the DV_CC pin forces all registers to all
0s whenever DV_CC is <1V. Bypass to GND with a 0.1μF
capacitor.
SDA (Pin 11): I²C Data Input. Serial data is shifted one bit
per clock to control the LTC3577-3/LTC3577-4. The logic
level for SDA is referenced to DV_CC.
SCL (Pin 12): I²C Clock Input. The logic level for SCL is
referenced to DV_CC.
OVGATE (Pin 13): Overvoltage Protection Gate 0utput.
Connect OVGATE to the gate pin of an external N-channel
MOS pass transistor. The source of the transistor should
be connected to V_BUS and the drain should be connected
to the product’s DC input connector. In the absence of an
overvoltage condition, this pin is connected to an internal
charge pump capable of creating sufficient overdrive to
fully enhance this transistor. If an overvoltage condition
is detected, OVGATE is brought rapidly to GND to prevent
damage. OVGATE works in conjunction with OVSENSE to
provide this protection.
PWR_ON (Pin 14): Logic Input Used to Keep Buck1, Buck2
and LDO2 Enabled After Power-Up. May also be used to
enable regulators directly (sequence = LDO2 → Buck1 →
Buck2). See the “Pushbutton Interface Operation” section
for more information.
ON (Pin 15): Pushbutton Input. A weak internal pull-up
forces ON high when left floating. A normally open push-
button is connected from ON to ground to force a low
state on this pin.
PBSTAT (Pin 16): Open-drain output is a debounced
and buffered version of ON to be used for processor
interrupts.
EN3 (Pin 17): Enable Pin for Step-Down Switching
Regulator 3 (Buck3).
SW (Pins 18, 19, 20): Power Transmission (Switch) Pin
for LED Boost Converter. See the “LED Backlight/Boost
Operation” section for circuit hook-up and component
selection. I²C is used to control LED driver enable. I²C
default is LED driver off.
PGOOD (Pin 21): Open-Drain Output. PGOOD indicates that
Buck1, Buck2 and LDO1 are within 8% of final regulation
value. There is a 230ms delay from all regulators reaching
regulation and PGOOD going high.
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