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LTC3577-4_15 Datasheet, PDF (45/52 Pages) Linear Technology – Highly Integrated Portable Product PMIC
LTC3577-3/LTC3577-4
OPERATION
Hard Reset Timing
Hard reset provides a way to reset the μC/μP in case of a
software lockup. To initiate a hard reset, the pushbutton
is pressed (ON low) and held for greater than 14 seconds.
Once the hard reset time is exceeded the PGOOD input
will go low for 1.8ms which resets the μC/μP. Operation
of the enabled supplies is not effected by the hard reset
event. All enabled supplies should remain in regulation
and operating correctly assuming specified operating
conditions are met (i.e., no shorted supplies, etc).
There are only two methods to power down the LTC3577-3/
LTC3577-4 supplies: 1) PWR_ON goes low; 2) VOUT drops
below the VOUT UVLO threshold. If the μC/μP controls
shutdown by bringing PWR_ON low, it is possible that
the application can hang with all supplies enabled if the
μC/μP fails to reset correctly on hard reset. In this case
the battery will continue to be drained until VOUT drops
below the VOUT UVLO threshold, or the user intervenes to
shut down the application manually. The application can
be shut down manually by removing the battery and any
external supplies, or by providing a suicide button that
will bring PWR_ON low when pressed.
VOUT UVLO
ON (PB)
PBSTAT
50ms
>14 SEC
PWR_ON
BUCK1
BUCK2
LDO1
PGOOD
STATE PON
14 SEC
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1.8ms
Figure 18. Hard Reset Timing
Power-Up Sequencing
Figure 19 shows the actual power-up sequencing of the
LTC3577-3/LTC3577-4. Buck1, Buck2 and LDO2 are all ini-
tially disabled (0V). Once the pushbutton has been applied
(ON low) for 50ms PBSTAT goes low and LDO2 is enabled.
Once enabled, LDO2 slews up and enters regulation. The
actual slew rate is controlled by the soft-start function of
LDO2 which ramps the LDO reference up over a 200μs
period typically. After a 14ms delay from LDO2 being
enabled, Buck1 is enabled and slews up into regulation.
When Buck1 is within about 8% of final regulation, Buck2
is enabled and slews up into regulation. The bucks also
have a soft-start function to limit inrush current at start-
up. 230ms after Buck2 is within 8% of final regulation,
the PGOOD output will go high impedance (not shown in
Figure 19). The regulators in Figure 19 are slewing up with
nominal output capacitors and no load. Adding a load or
increasing output capacitance on any of the outputs will
reduce the slew rate and lengthen the time it takes the
regulator to get into regulation.
1
PBSTAT
0
LDO2
1V/DIV
0V
BUCK1
1V/DIV
0V
BUCK2
2V/DIV
0V
2ms/DIV
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Figure 19. Power-Up Sequencing
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