LTC3577-4_15 Datasheet, PDF (37/52 Pages) Linear Technology – Highly Integrated Portable Product PMIC

LTC3577-3/LTC3577-4
OPERATION
Diode Selection
When boosting to increasingly higher voltages, parasitic
capacitance at the switch pin becomes an increasing
large component of the switching loses. For this reason
it is important to minimize the capacitance on the switch
node. The diode selected should be sized to handle the
peak inductor current and the average output current.
At high boost voltages a diode with the lowest possible
junction capacitance will often result in a more efficient
solution than one with a lower forward drop.
I²C OPERATION
I²C Interface
The LTC3577-3/LTC3577-4 may communicate with a
bus master using the standard I²C 2-wire interface. The
Timing Diagram shows the relationship of the signals on
the bus. The two bus lines, SDA and SCL, must be high
when the bus is not in use. External pull-up resistors or
current sources, such as the LTC1694 SMBus accelerator,
are required on these lines. The LTC3577-3/LTC3577-4 are
both a slave receiver and slave transmitter. The I²C control
signals, SDA and SCL are scaled internally to the DV_CC
supply. DV_CC should be connected to the same power
supply as the bus pull-up resistors.
The I²C port has an undervoltage lockout on the DV_CC pin.
When DV_CC is below approximately 1V, the I²C serial port
is cleared and registers are set to the default configura-
tion of all zeros.
I²C Bus Speed
The I²C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
operation when addressed from an I²C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupted.
I²C START and STOP Conditions
A bus master signals the beginning of communications
by transmitting a START condition. A START condition is
generated by transitioning SDA from HIGH to LOW while
SCL is HIGH. The master may transmit either the slave
write or the slave read address. Once data is written to the
LTC3577-3/LTC3577-4, the master may transmit a STOP
condition which commands the LTC3577-3/LTC3577-4 to
act upon its new command set. A STOP condition is sent by
the master by transitioning SDA from LOW to HIGH while
SCL is HIGH. The bus is then free for communication with
another I²C device.
I²C Timing Diagram
00
START
SDA
00
ADDRESS
0100
WR
10
DATA BYTE A
A7 A6 A5 A4 A3 A2 A1 A0
DATA BYTE B
B7 B6 B5 B4 B3 B2 B1 B0
0 1 0 0 1 0 ACK
ACK
ACK
STOP
SCL
123456789123456789123456789
SDA
t_LOW
t_{SU, DAT}
SCL
t_{HD, STA}
START
CONDITION
t_HIGH
t_r
t_f
t_{HD, DAT}
t_{SU, STA}
t_{HD, STA}
t_SP
REPEATED START
CONDITION
t_BUF
t_{SU, STO}
357734 TD
STOP
CONDITION
START
CONDITION
357734fb
37