PALCE16V8 Datasheet, PDF (6/32 Pages) Advanced Micro Devices – EE CMOS 20-Pin Universal Programmable Array Logic

OE
DQ
CLK
Q
OE
DQ
CLK
Q
a. Registered active low
FOR ^{b. Registered active high}
DEVICSEIGSNS _{c. Combinatorial I/O active low}
L _{DE VCC}
USE ^{GANEW Note1}
d. Combinatorial I/O active high
V_CC
Note 1
e. Combinatorial output active low
f. Combinatorial output active high
Notes:
1. Feedback is not available on pins 15 and 16 in the
combinatorial output mode.
2. This configuration is not available on pins 15 and 16.
Adjacent I/O pin
Note 2
g. Dedicated input
Figure 2. Macrocell Configurations
16493E-2
6
PALCE16V8 and PALCE16V8Z Families