PALCE16V8 Datasheet, PDF (28/32 Pages) Advanced Micro Devices – EE CMOS 20-Pin Universal Programmable Array Logic

ENDURANCE CHARACTERISTICS
The PALCE16V8 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process.
This technology uses an EE cell to replace the fuse link used in bipolar parts. As a result, the
device can be erased and reprogrammed—a feature which allows 100% testing at the factory.
Symbol
t_DR
N
Parameter
Min Pattern Data Retention Time
Min Reprogramming Cycles
Test Conditions
Max Storage Temperature
Max Operating Temperature
Normal Programming Conditions
Value
10
20
100
Unit
Years
Years
Cycles
ROBUSTNESS FEATURES
PALCE16V8X-X/5 devices have some unique features that make them extremely robust,
R _{especially when operating in high-speed design environments. Pull-up resistors on inputs and}
O ^{I/O pins cause unconnected pins to default to a known state. Input clamping circuitry limits}
F ^{negative overshoot, eliminating the possibility of false clocking caused by subsequent ringing.}
A special noise filter makes the programming circuitry completely insensitive to any positive
S overshoot that has a pulse width of less than about 100 ns for the /5 versions. Selected /4 devices
are also being retrofitted with these robustness features.
ICE ^{S INPUT/OUTPUT EQUIVALENT SCHEMATICS FOR PALCE16V8}
EV ^{IGN VCC}
V_CC
D ^S _{> 50 kΩ}
GALEW ^DE _ESD
E ^Protection
and
US ^{N Clamping}
Programming
Pins Only
Programming
Voltage
Detection
Typical Input
Positive
Overshoot
Filter
Programming
Circuitry
V_CC
V_CC
> 50 kΩ
Provides ESD
Protection and
Clamping
Preload Feedback
Circuitry Input
Typical Output
16493E-10
28
PALCE16V8 and PALCE16V8Z Families