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PALCE16V8 Datasheet, PDF (31/32 Pages) Advanced Micro Devices – EE CMOS 20-Pin Universal Programmable Array Logic
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CONNECTION DIAGRAMS
Top View
DIP/SOIC
PLCC
CLK/I0 1
20 VCC
I1 2
I2 3
19 I/O7
18 I/O6
3 2 1 20 19
I3 4
I4 5
17 I/O5
16 I/O4
I3 4
I5 6
15 I/O3
I4 5
I6 7
R I7 8
O I8 9
F GND 10
ES Note:
S Pin 1 is marked for orientation.
14 I/O2
13 I/O1
12 I/O0
11 OE/I9
16493E-9
EVIC IGN PIN DESIGNATIONS
D S CLK = Clock
L E GND = Ground
A D I
= Input
G W I/O = Input/Output
E OE = Output Enable
USE N VCC = Supply Voltage
I5 6
I6 7
I7 8
9 10 11 12 13
18 I/O6
17 I/O5
16 I/O4
15 I/O3
14 I/O2
16493E-10
PALCE16V8 and PALCE16V8Z Families
31
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