X96012_08 Datasheet, PDF (7/23 Pages) Intersil Corporation – Universal Sensor Conditioner with Dual Look-up Table Memory and DACs

X96012
Nonvolatile WRITE Cycle Timing
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 3)
TYP
(Note 3)
UNITS
t_WC (Note 17) Nonvolatile Write Cycle Time
See Figure 3
5
10
ms
NOTES:
16. Cb = total capacitance of one bus line (SDA or SCL) in pF.
17. t_WC is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is the
minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
18. The minimum frequency requirement applies between a START and a STOP condition.
Timing Diagrams
SCL
t_SU:STA
SDA IN
SDA OUT
t_F
t_SU:DAT
t_HD:STA
t_HIGH
t_LOW
t_R
t_HD:DAT
t_AA
t_DH
t_SU:STO
t_BUF
FIGURE 1. BUS TIMING
SCL
SDA IN
WP
START
CLK 1
STOP
t_SU:WP
t_HD:WP
FIGURE 2. WP PIN TIMING
7
FN8216.3
February 20, 2008