X96012_08 Datasheet, PDF (11/23 Pages) Intersil Corporation – Universal Sensor Conditioner with Dual Look-up Table Memory and DACs

X96012
BYTE
ADDRESS
MSB
LSB
REGISTER
NAME
7
6
5
4
3
2
1
0
80h
NON-VOLATILE
I2DS
I1DS
I1 AND I2 DIRECTION
0: SOURCE
1: SINK
NV1234 ADCfiltOff
ADCIN
VRM
BL1
BL0
CONTROL ADC
1, 2, 3, 4
FILTERING
VOLATILITY 0: ON
0: VOLATILE ^{1: OFF}
1: NON-
VOLATILE
ADC INPUT VOLTAGE BLOCK LOCK
0: INTERNAL REFERENCE 00: NONE LOCKED
1: EXTERNALMODE
01: GPM LOCKED
0: INTERNAL 10: GPM, LUT1, LOCKED
1: EXTERNAL 11: GPM, LUT1, LUT2
LOCKED
CONTROL 0
81h
VOLATILE OR
NON-VOLATILE
DIRECT ACCESS TO LUT1
RESERVED RESERVED
L1DA5
L1DA4
L1DA3
L1DA2
L1DA1
L1DA0
CONTROL 1
82h
VOLATILE OR
NON-VOLATILE
DIRECT ACCESS TO LUT2
RESERVED RESERVED
L2DA5
L2DA4
L2DA3
L2DA2
L2DA1
L2DA0
CONTROL 2
83h
VOLATILE OR
NON-VOLATILE
DIRECT ACCESS TO DAC1
D1DA7
D1DA6
D1DA5
84h
VOLATILE OR
NON-VOLATILE
DIRECT ACCESS TO DAC2
D2DA7
D2DA6
D2DA5
D1DA4
D2DA4
D1DA3
D2DA3
D1DA2
D2DA2
D1DA1
D2DA1
D1DA0
D2DA0
CONTROL 3
CONTROL 4
85h
NON-VOLATILE
D2DAS
L2DAS
D1DAS
L1DAS
I2FSO1
I2FSO0
DIRECT
DIRECT
DIRECT
DIRECT
R2 SELECTION
ACCESS ACCESS ACCESS ACCESS
00: EXTERNAL
TO DAC2 TO LUT2 TO DAC1 TO LUT1
01: LOW INTERNAL
0: DISABLED 0: DISABLED 0: DISABLED 0: DISABLED 10: MIDDLE INTERNAL
1: ENABLED 1: ENABLED 1: ENABLED 1: ENABLED 11: HIGH INTERNAL
I1FSO1
I1FSO0
R1 SELECTION
00: EXTERNAL
01: LOW INTERNAL
10: MIDDLE INTERNAL
11: HIGH INTERNAL
CONTROL 5
86h
VOLATILE
WEL
RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED
WRITE
ENABLE
LATCH
0: WRITE
DISABLED
1: WRITE
ENABLED
ADC OUTPUT
87h
VOLATILE
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CONTROL 6
STATUS
REGISTERS IN BYTE ADDRESSES 88h THROUGH 8Fh ARE RESERVED.
FIGURE 4. CONTROL AND STATUS REGISTER FORMAT
11
FN8216.3
February 20, 2008