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X96012_08 Datasheet, PDF (4/23 Pages) Intersil Corporation – Universal Sensor Conditioner with Dual Look-up Table Memory and DACs
X96012
Electrical Specifications
Conditions are as follows, unless otherwise specified. All typical values are for TA = +25°C and 5V at pin VCC.
Maximum and minimum specifications are over the recommended operating conditions. All voltages are
referred to the voltage at pin VSS. All bits in control registers are “0”. 255Ω, 0.1%, resistor connected between
R1 and VSS, and another between R2 and VSS. 400kHz TTL input at SCL. SDA pulled to VCC through an
external 2kΩ resistor. 2-wire interface in “standby” (see Notes 9 and 10 on page 5). WP, A0, A1, and A2 floating.
VREF pin unloaded. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 3) TYP (Note 3) UNIT
IR
VPOR
Current from pin R1 or R2 to VSS
Power-on Reset Threshold
Voltage
0
3200
µA
1.5
2.8
V
VCCRamp
VCC Ramp Rate
0.2
50
mV/µs
VADCOK
ADC Enable Minimum Voltage Figure 11
2.6
2.8
V
NOTES:
2. These parameters are periodically sampled and not 100% tested.
3. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
4. The device goes into Standby: 200ns after any STOP, except those that initiate a nonvolatile write cycle. It goes into Standby tWC after a STOP
that initiates a nonvolatile write cycle. It also goes into Standby 9 clock cycles after any START that is not followed by the correct Slave Address
Byte.
5. tWC is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is the
minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
6. For this range of V(VREF) the full scale sink mode current at I1 and I2 follows V(VREF) with a linearity error smaller than 1%.
7. These parameters are periodically sampled and not 100% tested.
8. TCOref = [Max V(VREF) - Min V(VREF)] x 106/(1.21V x +140°C).
D/A Converter Characteristics (See “Electrical Specifications” table starting on page 3 for standard conditions).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 3) TYP
IFS00
I1 or I2 Full Scale Current, with External Resistor (Notes 9, 12)
Setting
(Notes 2, 9, 13)
1.56
1.58
IFS01
IFS10
IFS11
I1 or I2 Full Scale Current, with Internal Low
DAC input Byte = FFh,
0.3
0.4
Current Setting Option
Source or sink mode, V(I1) and V(I2)
I1 or I2 Full Scale Current, with Internal Middle
are VCC - 1.2V in source mode and
1.2V in sink mode.
0.64
0.85
Current Setting Option
(Notes 10, 11)
I1 or I2 Full Scale Current, with Internal High
1
1.3
Current Setting Option
OffsetDAC I1 or I2 D/A Converter Offset Error
1
FSErrorDAC I1 or I2 D/A Converter Full Scale Error
-2
DNLDAC
I1 or I2 D/A Converter Differential Nonlinearity
-0.5
INLDAC
I1 or I2 D/A Converter Integral Nonlinearity with
-1
Respect to a Straight Line Through 0 and the Full
Scale Value
VISink
I1 or I2 Sink Voltage Compliance
(Note 12)
1.2
(Notes 2, 13)
2.5
VISource
I1 or I2 Source Voltage Compliance
(Note 12)
0
(Notes 2, 13)
0
MAX
(Note 3)
1.6
3.2
0.5
1.06
1.6
1
2
0.5
1
VCC
VCC
VCC - 1.2
VCC - 2.5
UNIT
mA
mA
mA
mA
mA
LSB
LSB
LSB
LSB
V
V
V
V
4
FN8216.3
February 20, 2008