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X96012_08 Datasheet, PDF (15/23 Pages) Intersil Corporation – Universal Sensor Conditioner with Dual Look-up Table Memory and DACs
X96012
LUT2 ROW
SELECTION BITS
D0H
6
A
D
D
8
E
8R
LUT2
10FH
D0H
D2DA[7:0] : CONTROL REGISTER 4
8
D1
8
D0 OUT
SELECT
DAC 2
INPUT BYTE
D2DAS: BIT 7 OF
CONTROL REGISTER 5
LUT1 ROW
SELECTION BITS
90H
6
A
D
D
8
E
8R
LUT1
CFH
90H
D1DA[7:0] : CONTROL REGISTER 3
8
D1
8
D0 OUT
SELECT
DAC 1
INPUT BYTE
D1DAS: BIT 5 OF
CONTROL REGISTER 5
FIGURE 9. LOOK-UP TABLE (LUT) OPERATION
By examining the block diagram in Figure 8, we see that the
maximum current through pin I1 is set by fixing values for
V(VREF) and R1. The output current can then be varied by
changing the data byte at the D/A converter input.
In general, the magnitude of the current at the D/A converter
output pins (I1, I2) may be calculated using Equation 1:
Ix = (V • (Vref) ⁄ (384 • Rx ) ) • N
(EQ. 1)
where x = 1, 2 and N is the decimal representation of the
input byte to the corresponding D/A converter.
The value for the resistor Rx (x = 1, 2) determines the full
scale output current that the D/A converter may sink or
source. The full scale output current has a maximum value of
±3.2mA, which is obtained using a resistance of 255Ω for Rx.
This resistance may be connected externally to pin Rx of the
X96012, or may be selected from one of three internal values.
Bits I1FSO1 and I1FSO0 select the full scale output current
setting for I1 as described in “I1FSO1 - I1FSO0: Current
Generator 1 Full Scale Output Set Bits (Non-volatile)” on
page 12. Bits I2FSO1 and I2FSO0 select the maximum
current setting for I2. When an internal resistor is selected for
R1 or R2, then no resistor should be connected externally at
the corresponding pin.
D/A Converter Output Current Response
When the D/A converter input data byte changes by an
arbitrary number of bits, the output current changes from an
initial current level (Ix) to some final level (Ix + ΔIx). The
transition is monotonic and glitchless.
D/A Converter Control
The data byte inputs of the D/A converters can be controlled
in three ways:
1) With the A/D converter and through the look-up tables
(default),
2) Bypassing the A/D converter and directly accessing the
look-up tables,
3) Bypassing both the A/D converter and look-up tables, and
directly setting the D/A converter input byte.
The options are summarized in Tables 5 and 6.
TABLE 5. D/A CONVERTER 1 ACCESS SUMMARY
L1DAS D1DAS
CONTROL SOURCE
0
0
A/D converter through LUT1 (Default)
1
0
Bits L1DA5 - L1DA0 through LUT1
X
1
Bits D1DA7 - D1DA0
NOTE: “X” = Don’t Care Condition (May be either “1” or “0”)
Bits I1DS and I2DS in Control Register 0 select the direction
of the currents through pins I1 and I2 independently (see
“I1DS: Current Generator 1 Direction Select Bit (Non-volatile)”
on page 9 and “Control and Status Registers” on page 9).
TABLE 6. D/A CONVERTER 2 ACCESS SUMMARY
L2DAS D2DAS
CONTROL SOURCE
0
0
A/D converter through LUT2 (Default)
1
0
Bits L2DA5 - L2DA0 through LUT2
X
1
Bits D2DA7 - D2DA0
NOTE: “X” = Don’t Care Condition (May be either “1” or “0”)
15
FN8216.3
February 20, 2008