X96012_08 Datasheet, PDF (20/23 Pages) Intersil Corporation – Universal Sensor Conditioner with Dual Look-up Table Memory and DACs

X96012
SIGNALS FROM
THE MASTER
WRITE
S
T
A
SLAVE
R
ADDRESS
T
ADDRESS
BYTE
DATA
BYTE
S
T
O
P
SIGNAL AT SDA
10 10
0
SIGNALS FROM
THE SLAVE
A
A
A
C
C
C
K
K
K
FIGURE 18. BYTE WRITE SEQUENCE
SIGNALS FROM
THE MASTER
SIGNAL AT SDA
SIGNALS FROM
THE SLAVE
WRITE
S
T
A
SLAVE
R
ADDRESS
T
ADDRESS
BYTE
2 < n < 16
DATA BYTE (1)
S
T
DATA BYTE (N)
O
P
10 10
0
A
A
C
C
K
K
A
A
C
C
K
K
FIGURE 19. PAGE WRITE OPERATION
7 BYTES
5 BYT5EBSYTES
ADDRESS = 0
ADDRESS = 6
ADDRESS = 11
ADDRESS = 7
ADDRESS POINTER
ENDS UP HERE
ADDRESS = 15
FIGURE 20. EXAMPLE: WRITING 12 BYTES TO A 16-BYTE PAGE STARTING AT LOCATION 11
For example, if the master writes 12 bytes to a 16-byte page
starting at location 11 (decimal), the first 5 bytes are written
to locations 11 through 15, while the last 7 bytes are written
to locations 0 through 6 within that page. Afterwards, the
address counter would point to location 7. If the master
supplies more than 16 bytes of data, then new data
overwrites the previous data, one byte at a time. See
Figure 20.
The master terminates the loading of Data Bytes by issuing
a STOP condition, which initiates the nonvolatile write cycle.
As with the Byte Write operation, all inputs are disabled until
completion of the internal write cycle.
A Page Write operation cannot be performed on the page at
locations 80h through 8Fh. The next section describes the
special cases within that page.
A Page Write operation starting with byte address FFh,
accesses the page between locations 100h and 10Fh. The
first data byte of such operation is written to location 100h.
Writing to Control Registers
The byte at location 80h, 85h, and 86h are written using Byte
Write operations. They cannot be written using a Page Write
operation.
Control bytes 1 through 4, at locations 81h through 84h
respectively, are written during a single operation (see
Figure 21). The sequence must be: a START, followed by a
Slave Address byte, with the R/W bit equal to “0”, followed by
81h as the Address Byte, and then followed by exactly four
Data Bytes, and a STOP condition. The first data byte is
written to location 81h, the second to 82h, the third to 83h,
and the last one to 84h.
20
FN8216.3
February 20, 2008