ISL6308A Datasheet, PDF (21/28 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

ISL6308A
initial load transient spike, as shown in Figure 18. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
1. Capture a transient event with the oscilloscope set to
about L/DCR/2 (sec/div). For example, with L = 1µH and
DCR = 1mΩ, set the oscilloscope to 500µs/div.
2. Record ΔV1 and ΔV2 as shown in Figure 18.
3. Select a new value, R_COMP,2, for the time constant
resistor based on the original value, R_COMP,1, using
Equation 27.
R_{COMP, 2}
=
R_C
O
M P,
1
⋅
Δ_----V_----1--
ΔV₂
(EQ. 27)
4. Replace R_COMP with the new value and check to see that
the error is corrected. Repeat the procedure if necessary.
After choosing a new value for R_COMP, it will most likely be
necessary to adjust the value of R_S to obtain the desired full
load droop voltage. Use Equation 26 to obtain the new value
for R_S.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation, as
described in “Load-Line (Droop) Regulation” on page 13,
there are two distinct methods for achieving these goals.
Compensating the Load-Line Regulated Converter
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R₂ and C₁.
ΔV₂
ΔV₁
V_OUT
C₂ (OPTIONAL)
R₂
C₁
COMP
FB
ISL6308A
R₁
VDIFF
FIGURE 19. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6308A CIRCUIT
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R₁, has already been chosen as
outlined in “Load Line Regulation Component Selection
(DCR Current Sensing)” on page 20. Select a target
bandwidth for the compensated system, F₀. The target
bandwidth must be large enough to assure adequate
transient performance, but smaller than 1/3 of the per
channel switching frequency. The values of the
compensation components depend on the relationships of
F₀ to the L-C double pole frequency and the ESR zero
frequency. For each of the following three, there is a
separate set of equations for the compensation components.
Case 1:
-------------1--------------
2π ⋅ L ⋅ C
>
F₀
R₂
=
R₁
⋅
2----π_-----⋅_{---F----0----}⋅_{---V-----O----S----C-----}⋅_{--------L----}⋅_---C---
0.66 ⋅ V_IN
C₁
=
------------0---.--6---6-----^â‹---V-----^I-^N--------------
2π ⋅ V_OSC ⋅ R₁ ⋅ f₀
I_TRAN
ΔI
FIGURE 18. TIME CONSTANT MISMATCH BEHAVIOR
Case 2:
-------------1--------------
2π ⋅ L ⋅ C
≤
F₀
<
2----π^-----⋅^---C----1--⋅^{---E----S-----R---}
R₂ = R₁ ⋅ ^V-----O----^S----^C-----^â‹-0--⁽--.-26----^π_6---⁾--_â‹-²--V--^â‹--_I-F-_N---⁰²----^â‹---L-----^â‹---C---
C₁
=
----------------------------0---.--6---6-----^â‹---V----^I--^N-----------------------------
(2π)² ⋅ F₀₂ ⋅ V_OSC ⋅ R₁ ⋅ L ⋅ C
(EQ. 28)
21
FN6669.0
September 9, 2008