82C50A Datasheet, PDF (18/21 Pages) Intersil Corporation – CMOS Asynchronous Communications Element

82C50A
AC Electrical Specifications V_CC = 5.0V ±10%, T_A = 0^oC to +70^oC (C82C50A-5)
T_A = -40^oC to +85^oC (l82C50A-5)
T_A = -55^oC to +125^oC (M82C50A-5)
Timing (Continued)
SYMBOL
BAUD GENERATOR
(29) N Baud Divisor
PARAMETER
(30) TBLD
(31) TBHD
(32) TLW
(33) THW
RECEIVER
(34) TSCD
(35) TSlNT
Baud Output Negative Edge Delay
Baud Output Positive Edge Delay
Baud Output Down Time
Baud Output Up Time
Delay from RCLK to Sample Time
Delay from Stop to Set Interrupt
(36) TRlNT Delay from DISTR DISTR (RD RBR) to
Reset Interrupt
TRANSMITTER
(37) THR Delay from DOSTR DOSTR to Reset Interrupt
(38) TlRS Delay from Initial INTR Reset to Transmit Start
(39) TS1 Delay from Initial Write to Interrupt
(40) TSTl Delay from Stop to Interrupt (THRE)
(41) TIR Delay from DISTR DISTR (RD lIR) to Reset Interrupt
(THRE)
MODEM CONTROL
(42) TMDO Delay from DOSTR DOSTR to Output
(43) TSIM Delay to Set Interrupt from Modem Input
(44) TRIM Delay to Reset Interrupt from DISTR DlSTR
(RD MSR)
82C50A-5
MIN
MAX
UNITS
TEST CONDITIONS
1
2¹⁶-1
-
250
ns
-
250
ns
40
-
ns
40
-
ns
T_XL = 50ns
T_XH = 50ns
-
250
ns
1
1
BAUDOUT
Cycles
-
250
ns
-
250
ns
8
24
BAUDOUT
Cycles
16
32
BAUDOUT
Cycles
8
24
BAUDOUT
Cycles
-
250
ns
-
500
ns
-
500
ns
-
500
ns
AC Test Circuit
V1
TEST CONDITION DEFINITION TABLE
OUTPUT FROM
DEVICE UNDER TEST
R1
TEST
POINT
C1 (NOTE)
IOH
-2.5mA
IOL
+2.5mA
V1
1.7V
R1
520Ω
C1
100pF
NOTE: Includes stay and jig capacitance.
AC Testing Input, Output Waveform
INPUT
V_IH + 0.4V
1.5V
V_IL - 0.4V
OUTPUT
V_OH
1.5V
V_OL
AC Testing: All input signals must switch between V_IL -0.4V and
V_IH +0.4V. Input rise and fall times are driven at 1ns/V.
18