82C50A Datasheet, PDF(15/21 Page) Intersil Corporation – CMOS Asynchronous Communications Element

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82C50A Datasheet, PDF (15/21 Pages) Intersil Corporation – CMOS Asynchronous Communications Element

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82C50A

Out2

RTS

DTR

Out1

TABLE 7. 82C50A RESET OPERATIONS (Continued)

RESET CONTROL

Master Reset

High

RESET

Programming

The 82C50A is programmed by the control registers LCR,

lER, DLL and DLM, and MCR. These control words deï¬ne

the character length, number of stop bits, parity, baud rate,

and modem interface.

While the control registers can be written in any order, the

lER should be written to last because it controls the interrupt

enables. Once the 82C50A is programmed and operational,

these registers can be updated any time the 82C50A is not

transmitting or receiving data.

The control signals required to access 82C50A internal reg-

isters are shown below.

Software Reset

A software reset of the 82C50A is a useful method for return-

ing to a completely known state without a system reset.

Such a reset consists of writing to the LCR, Divisor Latches,

and MCR registers. The LSR and RBR registers should be

read prior to enabling interrupts in order to clear out any

residual data or status bits which may be invalid for subse-

quent operation.

Crystal Operation

The 82C50A crystal oscillator circuitry is designed to oper-

ate with a fundamental mode, parallel resonant crystal. Table

8 shows the required crystal parameters and crystal circuit

conï¬guration, respectively.

When using an external clock source, the XTAL1 input is

driven and the XTAL2 output is left open. Power

consumption when using an external clock is typically 50%

of that required when using a crystal. This is due to the

sinusoidal nature of the drive circuitry when using a crystal.

The maximum frequency of the 82C50A is 10MHz with an

external clock or a crystal attached to XTAL1 and XTAL2.

Using the external clock or crystal, and a divide by one

divisor, the maximum BAUDOUT is 10MHz, and the

maximum data rate is 625Kbps.

TABLE 8. TYPICAL CRYSTAL OSCILLATOR CIRCUIT

PARAMETER

Frequency

1.0 to 10MHz

Type of Operation

Parallel Resonant, Fundamental

Mode

Load Capacitance (CL) 20 or 32pF (Typ)

RSERIES (Max)

100â¦ (f = 10MHz, CL = 32pF)

200â¦ (f = 10MHz, CL = 20pF)

XTAL1

PIN 16

XTAL

BAUD RATE

GENERATOR

LOGIC

XTAL2

PIN 17

82C50A

FIGURE 2. TYPICAL CRYSTAL OSCILLATOR CIRCUIT

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