82C50A Datasheet, PDF (16/21 Pages) Intersil Corporation – CMOS Asynchronous Communications Element

82C50A
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.5V to V_CC +0.5V
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range
C82C50A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0^oC to +70^oC
I82C50A-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40^oC to +85^oC
M82C50A-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55^oC to +125^oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (^oC/W) θ_JC (^oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
35
10
Plastic DIP Package . . . . . . . . . . . . . .
50
N/A
Plastic LCC Package . . . . . . . . . . . . . .
46
N/A
Maximum Junction Temperature
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175^oC
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150^oC
Max Storage Temperature Range . . . . . . . . . . . . . .-65^oC to +150^oC
Max Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . +300^oC
(Lead Tips Only for Surface Mount Packages)
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1788 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ_JA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications V_CC = 5.0V ±10%, T_A = 0^oC to +70^oC (C82C50A-5)
T_A = -40^oC to +85^oC (l82C50A-5)
T_A = -55^oC to +125^oC (M82C50A-5)
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
V_IH
Logical One Input Voltage
2.0
-
2.2
-
V
I82C50A-5, C82C50A-5
V
M82C50A-5
V_IL
Logical Zero Input Voltage
-
0.8
VTH
Schmitt Trigger Logic One Input Voltage
2.0
-
V
V
MR Input 82C50A-5, C82C50A-5
2.2
-
V
M82C50A-5
VTL
Schmitt Trigger Logic Zero Input Voltage
-
0.8
V
MR Input
VIH (CLK) Logical One Clock Voltage
VlL (CLK) Logical Zero Clock Voltage
V_CC-0.8
-
-
0.8
V
External Clock
V
External Clock
V_OH
Output High Voltage
V_OL
Output Low Voltage
II
Input Leakage Current
3.0
V_CC-0.4
-
-1.0
-
-
0.4
+1.0
V
I_OH = -2.5mA
V
I_OH = -100µA
V
l_OL = +2.5mA,
µA
V_IN = GND or V_CC, DIP Pins 9,10,12,
13, 14, 18, 19, 21, 22, 25-28, 35-39
IO
ICCOP
Input/Output Leakage Current
Operating Power Supply Current
-10.0
-
+10.0
6
µA
V_O = GND or V_CC, DIP Pins 1-8
mA
External Clock F = 2.4576MHz,
V_CC = 5.5V, V_IN = V_CC or GND,
Outputs Open
ICCSB Standby Supply Current
-
100
µA
V_CC = 5.5V, V_IN = V_CC or GND,
Outputs Open
Capacitance T_A = 25^oC
SYMBOL
PARAMETER
CIN
Input Capacitance
COUT Output Capacitance
CI/O
I/O Capacitance
TYPICAL
15
15
20
UNITS
pF
pF
pF
TEST CONDITIONS
FREQ = 1MHz, all measurements are
referenced to device GND
16