ISL6551IREC Datasheet, PDF (17/23 Pages) Intersil Corporation – ZVS Full Bridge PWM Controller

ISL6551IREC
RESISTOR SENSE
This simple scheme is used in a primary side control system.
The sum of the current that flows through both lower primary
FETs is sensed with a low impedance power resistor. The
sources of Q3 and Q4 and ISENSE should be tied at the same
point as close as possible.
Biases
Linear Regulator - In a primary side control system, a
linear regulator derived from the input line can be used for
the start-up purpose, and an extra winding coupled with the
main transformer can provide the controller power after the
start-up.
DCM Flyback - Use a PWM controller to develop both
primary and secondary biases with discontinuous current
mode flyback topology.
Primary FETs
V_INF OR
CURRENT_SEN_P
Q1_G
P–
Q1
Q2_G
Q2
P+
Feedback
VOPOUT
EAO
EAI
FIGURE 16A. SECONDARY CONTROL
VOPOUT
VREF = 5V
IL207
TL431
EAO
EAI
Q3_G
Q3
Q4_G
Q4
Q3_S
Q4_S
FIGURE 15A. FULL BRIDGE
P1–
P2–
Q3_G
Q3
Q4_G
Q4
Q3_S
Q4_S
FIGURE 15B. PUSH-PULL
FULL BRIDGE
Four MOSFETs are required for full bridge converters. The
drain to source voltage rating of the MOSFETs is Vin.
PUSH-PULL
Only the two lower MOSFETs are required for push-pull
converters. The two upper drivers are not used. The V_DS of
the MOSFETs is 2xVin.
FIGURE 16B. PRIMARY CONTROL
SECONDARY CONTROL
In secondary side control systems, only a few resistors and
capacitors are required to complete the feedback loop.
PRIMARY CONTROL
This feedback loop configuration for primary side control
systems requires an optocoupler for isolation. The
bandwidth is limited by the optocoupler.
Rectifiers
SYNCHRONOUS FETs
S+
SCHOTTKY
S+
SYNP
SYNN
S–
S–
FIGURE 17A. CURRENT DOUBLER RECTIFIERS
17
FN6762.0
September 2, 2008