300 Datasheet, PDF (67/95 Pages) DB Lectro Inc – SCREW TYPE SERIES

Land Listing and Signal Descriptions
Table 25.
Signal Description (Sheet 1 of 9)
Name
DBR#
DBSY#
DEFER#
DP[3:0]#
DRDY#
Type
Description
Output
DBR# (Debug Reset) is used only in processor systems where no
debug port is implemented on the system board. DBR# is used by a
debug port interposer so that an in-target probe can drive system
reset. If a debug port is implemented in the system, DBR# is a no
connect in the system. DBR# is not a processor signal.
Input/
Output
DBSY# (Data Bus Busy) is asserted by the agent responsible for
driving data on the processor FSB to indicate that the data bus is in
use. The data bus is released after DBSY# is de-asserted. This
signal must connect the appropriate pins/lands on all processor FSB
agents.
Input
DEFER# is asserted by an agent to indicate that a transaction
cannot be ensured in-order completion. Assertion of DEFER# is
normally the responsibility of the addressed memory or input/output
agent. This signal must connect the appropriate pins/lands of all
processor FSB agents.
Input/
Output
DP[3:0]# (Data parity) provide parity protection for the D[63:0]#
signals. They are driven by the agent responsible for driving
D[63:0]#, and must connect the appropriate pins/lands of all
processor FSB agents.
Input/
Output
DRDY# (Data Ready) is asserted by the data driver on each data
transfer, indicating valid data on the data bus. In a multi-common
clock data transfer, DRDY# may be de-asserted to insert idle clocks.
This signal must connect the appropriate pins/lands of all processor
FSB agents.
DSTBN[3:0]# are the data strobes used to latch in D[63:0]#.
DSTBN[3:0]#
Input/
Output
Signals
D[15:0]#, DBI0#
D[31:16]#, DBI1#
D[47:32]#, DBI2#
D[63:48]#, DBI3#
Associated Strobe
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP[3:0]# are the data strobes used to latch in D[63:0]#.
DSTBP[3:0]#
Input/
Output
Signals
D[15:0]#, DBI0#
D[31:16]#, DBI1#
D[47:32]#, DBI2#
D[63:48]#, DBI3#
Associated Strobe
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
FCx
Other
FC signals are signals that are available for compatibility with other
processors.
Datasheet
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