82562V Datasheet, PDF (6/42 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect

82562V — Networking Silicon
2.1.3
2.2
LAN Connect Clock Operations
The 82562V drives the Platform LAN Connect clock (JCLK) at one of two possible frequencies
depending upon its operation speed. When the 82562V is in 100BASE-TX mode it drives JCLK at
50 MHz. When the 82562V is in 10BASE-T mode it drives JCLK at 5 MHz. The LAN Connect
clock does not stop during normal operation under any conditions. In reduced power mode, the
82562V drives JCLK at 5 MHz, which is required for proper filtering of incoming packets for
applications such as Wake on LAN (WoL).
Hardware Configuration
Four pins, Test Enable (TESTEN), Test Clock (ISOL_TCK), Test Input (ISOL_TI), and Test
Execute (ISOL_EXEC), define the general operation of the 82562V. Table 1 lists the pin settings
for the different modes of operation.
Table 1. 82562V Hardware Configuration
TESTEN
ISOL
_TCK
ISOL
_TI
ISOL_
EXEC
Mode
Comments
82562G family Mode 0:
The ISOL_TCK, ISOL_TCI, and
• LEDs are 82562E-compatible
ISOL_EXEC, and ADV10/
(“A” configuration)
LAN_DISABLE# pins have internal
• LAN_DISABLE# pin is used as ^{10 K Ω pull-down resistors and should}
0
0
0
0
ADV10 (auto-negotiation
not be connected for Mode 0 (refer to
advertise 10M only)
Table 2).
Alternative Mode: drop-in
replacement for existing 82562E-
based designs
For the alternative 82562E drop-in
replacement mode, pins may
optionally be used as a LAN disable.
82562G family Mode 1:
0
0
1
1
• LEDs are in configuration B
• LAN_DISABLE# pin is single
The ISOL_TCK pin has an internal 10
K Ω pull-down resistor and should not
be connected for Mode 1 (refer to
pin LAN disable (tri-state and full _{Table 2).}
power down function)
0
1
1
1 Isolate
Tri-state and power down.
1
0
1
0 Testing Mode
1
0
0
0 XOR Tree
Board testing plus tri-state.
82562G family Mode 2:
The ISOL_TCK and ISOL_TI pins
1
0
0
1
have 10 K Ω internal pull-down
Same as 0011 except that LEDs are in _{resistors and should not be connected}
configuration C
for Mode 2 (refer to Table 2).
82562G family Mode 3:
The ISOL_TCK pin has an internal 10
1
0
1
1 _{Same as 0011 except enhance Tx rise} K Ω pull-down resistor and should not
and fall times.
be connected for Mode 3.
82562G family Mode 4:
The ISOL_TI and ISOL_EXEC pins
1
1
0
0
have internal 10 K Ω pull-down
Same as 1001 except Enhance Tx rise _{resistors and should not be connected}
and fall times.
for Mode 4.
4
Datasheet