82077AA Datasheet, PDF (54/62 Pages) Intel Corporation – CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER

82077AA
A C SPECIFICATIONS (Continued)
T_A ^e 0 C to 70 C V_CC ^{e a}5V g10% V_SS ^e AV_SS ^e 0V
Symbol
Parameter
Min
Max
Unit
HOST WRITE CYCLES
t15
Address Setup to WR
5
ns
t16
WR Pulse Width
90
ns
t17
Address Hold from WR
0
ns
t18
Command Inactive
60
ns
t19
Data Setup to WR
70
ns
t20
Data Hold from WR
0
ns
t21
INT Delay from WR
t5 ^a 125
ns
DMA CYCLES
t22
DRQ Cycle Period⁽¹⁾
65
ms
t23
DACK to DRQ Inactive
75
ns
t24
RD to DRQ Inactive⁽⁴⁾
100
ns
t25
DACK Setup to RD WR
5
ns
t26
DACK Hold from RD WR
0
ns
t27
DRQ to RD WR Active⁽¹⁾
0
6
ms
t28
Terminal Count Width⁽¹⁰⁾
50
ns
t29
TC to DRQ Inactive
150
ns
RESET
t30
‘‘Hardware’’ Reset Width⁽⁵⁾
170
t4
t30a
‘‘Software’’ Reset Width⁽⁵⁾
(Note 11)
ms
t31
Reset to Control Inactive
2
ms
WRITE DATA TIMING
t32
Write Data Width⁽⁶⁾
ns
DRIVE CONTROL
t35
DIR Setup to STEP⁽¹⁴⁾
10
ms
t36
DIR Hold from STEP
10
ms
t37
STEP Active Time (High)
25
ms
t38
STEP Cycle Time⁽²⁾
ms
t39
INDEX Pulse Width
5
t5
t41
WE to HDSEL Change
(Note 13)
ms
54