82077AA Datasheet, PDF (39/62 Pages) Intel Corporation – CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER

82077AA
ferred across the host bus To accommodate soft-
ware of this type it is recommended that the FIFO
be disabled
followed with a SENSE INTERRUPT STATUS com-
mand from the host to clear the interrupt condition
for each of the four logical drives
7 4 Drive Polling
The 82077AA supports the polling mode of the older
generation 8272A This mode is enabled upon a re-
set and can be disabled via the CONFIGURE com-
mand This mode is supported for the sole purpose
of providing backwards compatibility with software
that expects it’s presence
The intended purpose of drive polling dates back to
8 drives as a means to monitor any change in
status for each disk drive present in the system
Each of the drives is selected for a period of time
and its READY signal sampled After a delay the
next drive is selected Since the 82077AA does not
support READY in this capacity (internally tied true)
the polling sequence is only simulated and does not
affect the drive select lines (DS0–DS3) when it is
active If enabled it occurs whenever the 82077AA
is waiting for a command or during SEEKs and RE-
CALIBRATEs (but not IMPLIED SEEKs) Each drive
is assumed to be not ready after a reset and a
‘‘ready’’ value for each drive is saved in an internal
register as the simulated drive is polled An interrupt
will be generated on the first polling loop because of
the initial ‘‘not ready’’ status This interrupt must be
8 0 PROGRAMMING GUIDELINES
Programming the 82077AA is identical to any other
8272A compatible disk controller with the exception
of some additional commands For the new designer
it is useful to provide some guidelines on how to
program the 82077AA A typical disk operation in-
volves more than issuing a command and waiting for
the results The control of the floppy disk drive is a
low level operation that requires software interven-
tion at different stages New commands and fea-
tures have been added to the 82077AA to reduce
the complexity of this software interface
8 1 Command and Result Phase
Handshaking
Before a command or parameter byte can be issued
to the 82077AA the Main Status Register (MSR)
must be interrogated for a ready status and proper
FIFO direction A typical floppy controller device
driver should contain a subroutine for sending com-
mand or parameter bytes For this discussion the
routine will be called ‘‘Send byte’’ with the flow-
chart shown in Figure 8-1
Figure 8-1 Send Byte Routine
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