80960CF-30 Datasheet, PDF (39/62 Pages) Intel Corporation – SPECIAL ENVIRONMENT 80960CF-30, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR

SPECIAL ENVIRONMENT 80960CF-30 -25 -16
NOTE
Case 1 and Case 2 show two possible polarities of PCLK2 1
Figure 22a Clock Synchronization in the 2x Clock Mode
271328 – 24
271328 – 25
NOTE
In 1x clock mode the RESET pin is actually sampled on the falling edge of 2XCLK 2XCLK is an internal signal generat-
ed by the PLL and is not available on an external pin Therefore RESET is specified relative to the rising edge of CLKIN
The RESET pin is sampled when PCLK is high
Figure 22b Clock Synchronization in the 1x Clock Mode
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