80960CF-30 Datasheet, PDF (22/62 Pages) Intel Corporation – SPECIAL ENVIRONMENT 80960CF-30, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR

SPECIAL ENVIRONMENT 80960CF-30 -25 -16
4 0 ELECTRICAL SPECIFICATIONS
4 1 Absolute Maximum Ratings
Parameter
Maximum Rating
Storage Temperature
Case Temperature Under Bias⁽²⁾
Supply Voltage wrt V_SS
Voltage on Other pins wrt V_SS
b65 C to a150 C
b40 C to a125 C
b0 5V to a6 5V
b0 5V to V_CC a0 5V
NOTICE This data sheet contains information on
products in the sampling and initial production phases
of development It is valid for the devices indicated in
the revision history The specifications are subject to
change without notice
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
4 2 Operating Conditions
Symbol
V_CC
f_CLK2x
f_CLK1x
T_C
Operating Conditions (80960CF-33 -25 -16)
Parameter
Min
Supply Voltage
80960CF-30
4 75
80960CF-25
4 50
80960CF-16
4 50
Input Clock Frequency (2-x Mode) 80960CF-30
0
80960CF-25
0
80960CF-16
0
Input Clock Frequency (1-x Mode) 80960CF-30
8
80960CF-25
8
80960CF-16
8
Case Temperature Under Bias
80960CF-30 -25 -16
PGA Package ^b40
Max
5 25
5 50
5 50
60 6
50
32
30 3
25
16
a₁₁₀
Units
V
MHz
MHz
MHz
MHz
MHz
MHz
C
Notes
(1)
NOTES
(1) When in the 1-x input clock mode CLKIN is an input to an internal phase-locked loop and must maintain a minimum
frequency of 8 MHz for proper processor operation However in the 1-x Mode CLKIN may still be stopped when the
processor either is in a reset condition or is reset If CLKIN is stopped the specified RESET low time must be provided once
CLKIN restarts and has stabilized
(2) Case temperatures are ‘‘Instant On’’
4 3 Recommended Connections
Power and ground connections must be made to
multiple V_CC and V_SS (GND) pins Every 80960CF-
based circuit board should include power (V_CC) and
ground (V_SS) planes for power distribution Every
V_CC pin must be connected to the power plane and
every V_SS pin must be connected to the ground
plane Pins identified as ‘‘N C ’’ must not be con-
nected in the system
Liberal decoupling capacitance should be placed
near the 80960CF The processor can cause tran-
sient power surges when its numerous output buff-
ers transition particularly when connected to large
capacitive loads
Low inductance capacitors and interconnects are
recommended for best high frequency electrical per-
formance Inductance can be reduced by shortening
board traces between the processor and decoupling
capacitors as much as possible Capacitors specifi-
cally designed for PGA packages will offer the low-
est possible inductance
For reliable operation always connect unused in-
puts to an appropriate signal level In particular any
unused interrupt (XINT NMI) or DMA (DREQ) input
should be connected to V_CC through a pull-up resis-
tor as should BTERM if not used Pull-up resistors
should be in the range of 20 KX for each pin tied
high If READY or HOLD are not used the unused
input should be connected to ground N C pins
must always remain unconnected Refer to the
i960 CA Microprocessor Reference Manual for more
information
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