3XX Datasheet, PDF (30/82 Pages) Intel Corporation – Celeron D Processor

Electrical Specifications
2.13 GTL+ FSB Specifications
Termination resistors are not required for most GTL+ signals; they are integrated into the processor
silicon.
Valid high and low levels are determined by the input buffers that compare a signal’s voltage with a
reference voltage called GTLREF. Table 2-18 lists the GTLREF specifications. The GTL+
reference voltage (GTLREF) should be generated on the system board using high precision voltage
divider circuits.
Table 2-18. GTL+ Bus Voltage Definitions
Symbol
Parameter
Min
Typ
Max
Units Notes¹
GTLREF_{_compatible}
GTLREF_{_optimized}
R_{_pullup}
Bus Reference Voltage 0.98 * (2/3 V_CC) 2/3 V_CC 1.02 * (2/3 V_CC)
V
Bus Reference Voltage (0.98 * 0.63) * V_CC 0.63 * V_CC (1.02 * 0.63) * V_CC V
On die pull-up for
BOOTSELECT and
OPTIMIZED/
500
COMPAT# pins
—
5000
Ω
2,3,4,5
2,3,4,5
5,6
R_{TT_compatible}
Termination
Resistance
45
50
55
Ω
5,7
R_{TT_optimized}
Termination
Resistance
54
60
66
Ω
5
COMP[1:0]_{_compatible}
COMP[1:0]_{_optimized}
COMP Resistance
COMP Resistance
49.4
61.3
49.9
61.9
50.4
62.5
Ω
5,8
Ω
5,8
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The tolerances for this specification have been stated generically to enable the system designer to calculate the mini-
mum and maximum values across the range of V_CC.
3. GTLREF should be generated from V_CC by a voltage divider of 1% resistors or 1% matched resistors.
4. The V_CC referred to in these specifications is the instantaneous V_CC.
5. These specifications are different depending on whether the platform is forward compatible to the Celeron D processor
or if it is optimized for the Celeron D processor. A compatible platform is one that is designed for a previous generation
processor but has some level of compatibility with the Celeron D processor. An optimized platform is one designed spe-
cifically for the Celeron D processor; however, it may have some level of compatibility with previous generation proces-
sors.
6. These pull-ups are to the internal V_CCVID supply.
7. R_TT is the on-die termination resistance measured at V_CC/2 of the GTL+ output driver.
8. COMP resistance must be provided on the system board with 1% resistors.
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Datasheet