8259A Datasheet, PDF (1/24 Pages) Intel Corporation – PROGRAMMABLE INTERRUPT CONTROLLER

8259A
PROGRAMMABLE INTERRUPT CONTROLLER
(8259A 8259A-2)
Y 8086 8088 Compatible
Y MCS-80 MCS-85 Compatible
Y Eight-Level Priority Controller
Y Expandable to 64 Levels
Y Programmable Interrupt Modes
Y Individual Request Mask Capability
Y Single a5V Supply (No Clocks)
Y Available in 28-Pin DIP and 28-Lead
PLCC Package
(See Packaging Spec Order 231369)
Y Available in EXPRESS
Standard Temperature Range
Extended Temperature Range
The Intel 8259A Programmable Interrupt Controller handles up to eight vectored priority interrupts for the CPU
It is cascadable for up to 64 vectored priority interrupts without additional circuitry It is packaged in a 28-pin
DIP uses NMOS technology and requires a single ^a5V supply Circuitry is static requiring no clock input
The 8259A is designed to minimize the software and real time overhead in handling multi-level priority inter-
rupts It has several modes permitting optimization for a variety of system requirements
The 8259A is fully upward compatible with the Intel 8259 Software originally written for the 8259 will operate
the 8259A in all 8259 equivalent modes (MCS-80 85 Non-Buffered Edge Triggered)
DIP
231468 – 2
PLCC
Figure 1 Block Diagram
December 1988
231468 – 1
231468 – 31
Figure 2 Pin
Configurations
Order Number 231468-003