IA186XL Datasheet, PDF (51/75 Pages) InnovASIC, Inc – 16-Bit Microcontroller

IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
5.3 Major Cycle Timings – Interrupt Acknowledge Cycle
T_A = -40^ï¿®C to +85^ï¿®C, V_CC = 5V + 10%
All timings are measured at 1.5V and 50 pF loading on CLKOUT unless otherwise noted.
All output test conditions are with C_L = 50 pF.
For AC tests, input V_IL = 0.45V and V_IH = 2.4V except at X1 where V_IH = V_CC – 0.5V.
Table 15. Major Cycle Timings – Interrupt Acknowledge Cycle
Symbol
T_DVCL
T_CLDX
T_CHSV
T_CHSH
T_CLAV
T_AVCH
T_CLAX
T_CLDV
T_CHDX
T_CHLH
T_LHLL
T_CHLL
T_AVLL
T_LLAX
T_CLAZ
T_CVCTV
T_CVCTX
T_DXDL
T_CHCTV
T_CVDEX
T_CLLV
Parameter
Data in Setup (A/D)
Data in Hold (A/D)
Status Active Delay
Status Inactive Delay
Address Valid Delay
Address Valid to Clock High
Address Hold
Data Valid Delay
Status Hold Time
ALE Active Delay
ALE Width
ALE Inactive Delay
Address Valid to ALE Low
Address Hold to ALE Inactive
Address Float Delay
Control Active Delay 1
Control Inactive Delay
DEN Inactive to DT/R Low
Control Active Delay 2
DEN Inactive Delay (Non-Write Cycles)
LOCK Valid/Invalid Delay
Values
Min
8
3
3
3
3
0
0
3
10
T_CLCL - 15
T_CLCH - 10
Max
20
20
20
20
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T_CHCL - 10
T_CLAX
3
3
0
3
3
3
ns
20 ns
17 ns
17 ns
ns
20 ns
17 ns
17 ns
Test
Conditions
Equal
Loading
Equal
Loading
Equal
Loading
®
IA211080711-09
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