IA186XL Datasheet, PDF (34/75 Pages) InnovASIC, Inc – 16-Bit Microcontroller

IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
Table 8. IA188XL Pin/Signal Descriptions (Continued)
Signal
lock_n
Name
lock_n
Pin
PLCC
48
PQFP
28
LQFP
45
Description
lock. Output. Active Low. When asserted
(low), this signal indicates that the bus cycle in
progress cannot be interrupted. While lock_n
is active, the IA188XL will not service bus
requests such as HOLD.
mcs0_n mcs0_n/pereq 38
mcs1_n mcs1_n/error_n 37
mcs2_n
mcs2_n
36
mcs3_n mcs3_n/nps_n 35
n.c.
n.c.
NA
nmi
nmi
46
pcs0_n
pcs0_n
25
pcs1_n
pcs1_n
27
pcs2_n
pcs2_n
28
pcs3_n
pcs3_n
29
pcs4_n
pcs4_n
30
pcs5_n pcs5_n/a1
31
pcs6_n pcs6_n/a2
32
qs0
ale/qs0
61
qs1
wr_n/qs1
63
qsmd_n rd_n/qsmd_n 62
rd_n rd_n/qsmd_n 62
39
40
41
42
2, 11,
14, 15,
24, 43,
44, 62,
63
30
54
52
51
50
49
48
47
10
8
9
9
57
58
59
60
4, 25,
35, 55,
72
When resin_n is active, this pin is weakly held
high and must not be driven low.
mid-range memory chip select. Output.
not connected
47 non-maskable interrupt. Input. Active High.
When the nmi signal is asserted (high) it
causes a Type 2 interrupt .
71 peripheral chip select signals 0–6. Output.
69
68
67
66
65
64
29 queue status 0, queue status 1. Output.
27
QS1 QS0
0
0 No Queue operations
0
1 First byte of opcode pulled from
Queue
1
1 Additional bytes pulled from
Queue
1
0 Queue is flushed
28 queue status mode. Input. Sampled at reset.
28 read. output. Active Low. When asserted
(low), rd_n indicates that the accessed
memory or I/O device must drive data from
the location being accessed onto the data
bus.
®
IA211080711-09
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