IA186XL Datasheet, PDF (33/75 Pages) InnovASIC, Inc – 16-Bit Microcontroller

IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
Table 8. IA188XL Pin/Signal Descriptions (Continued)
Signal
hlda
Name
hlda
Pin
PLCC
51
PQFP
25
LQFP
42
Description
hold acknowledge. Output. Active High.
When hlda is asserted (high), it indicates that
the IA188XL has relinquished control of the
local bus to another bus master in response to
a HOLD request (see next table entry).
hold
hold
50
26
int0
int0
45
31
int1
int1
44
32
int2
int2/inta0_n
42
35
int3
int3/inta1_n
41
36
When hlda is asserted, the IA188XL data bus
and control signals are floated allowing
another bus master to drive the signals
directly.
43 hold. Input. Active High. This signal is a
request indicating that an external bus master
wishes to gain control of the local bus. The
IA188XL will relinquish control of the local bus
between instruction boundaries not
conditioned by a LOCK prefix.
48 interrupt N (N = 03). Input. Active High.
49 ^{These maskable inputs interrupt program flow}
52 ^{and cause execution to continue at an}
53
interrupt vector of a specific interrupt type as
follows:
int0: Type 12
int1: Type 13
int2: Type 14
int3: Type 15
inta 0_n int2/inta0_n
42
35
inta 1_n int3/inta1_n
41
36
lcs_n
lcs_n
33
46
To allow interrupt expansion, int0 and int1
can be used with the interrupt acknowledge
signals inta0_n and inta1_n (see next table
entries).
52 interrupt acknowledge. Output. Active low.
53 ^{When used with external interrupt controllers.}
63 lower chip select. Output. Active Low. This
pin provides a chip select signal that will be
asserted (low) whenever the address of a
memory bus cycle is within the address space
programmed for that output.
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