IA186XL Datasheet, PDF (47/75 Pages) InnovASIC, Inc – 16-Bit Microcontroller

IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
5. AC Specifications
5.1 Major Cycle Timings – Read Cycle
T_A = -40^ï¿®C to +85^ï¿®C, V_CC = 5V + 10%
All timings are measured at 1.5V and 50 pF loading on CLKOUT unless otherwise noted.
All output test conditions are with C_L = 50 pF.
For AC tests, input V_IL = 0.45V and V_IH = 2.4V except at X1 where V_IH = V_CC – 0.5V.
Table 13. Major Cycle Timings – Read Cycle
Symbol
T_DVCL
T_CLDX
T_CHSV
T_CHSH
T_CLAV
T_CLAX
T_CLDV
T_CHDX
T_CHLH
T_LHLL
T_CHLL
T_AVLL
T_LLAX
T_AVCH
T_CLAZ
T_CLCSV
T_CXCSX
T_CHCSX
T_DXDL
T_CVCTV
T_CVDEX
T_CHCTV
T_CLLV
T_AZRL
T_CLRL
T_RLRH
T_CLRH
T_RHLH
Parameter
Data in Setup (A/D)
Data in Hold (A/D)
Status Active Delay
Status Inactive Delay
Address Valid Delay
Address Hold
Data Valid Delay
Status Hold Time
ALE Active Delay
ALE Width
ALE Inactive Delay
Address Valid to ALE Low
Address Hold from ALE Inactive
Address Valid to Clock High
Address Float Delay
Chip-Select Active Delay
Chip-Select Hold from Command Inactive
Chip-Select Inactive Delay
DEN Inactive to DT/R Low
Control Active Delay 1
DEN Inactive Delay
Control Active Delay 2
LOCK Valid/Invalid Delay
Address Float to RD Active
RD Active Delay
RD Pulse Width
RD Inactive Delay
RD Inactive to ALE High
Values
Min
8
3
3
3
3
0
3
10
T_CLCL - 15
T_CLCH - 10
T_CHCL - 8
0
T_CLAX
3
T_CLCH - 10
3
0
3
3
3
3
0
3
2_TCLCL - 15
3
T_CLCH - 14
Max
20
20
20
20
20
20
20
20
17
17
17
20
17
20
20
Unit Test Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns Equal Loading
ns Equal Loading
ns
ns
ns
ns Equal Loading
ns
ns Equal Loading
ns
ns
ns
ns
ns
ns
ns
ns
ns Equal Loading
®
IA211080711-09
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