IA82527 Datasheet, PDF (14/45 Pages) InnovASIC, Inc – Serial Communications Controller CAN Protocol

IA82527
CAN Serial Communications Controller
As of Production Ver. 00
04 May 2007
PRELIMINARY
Table 3. IA82527 Pin/Signal Descriptions, continued
Signal
p1.0
p1.1
p1.2
p1.3
p1.4
p1.5
p1.6
p1.7
Name
Pin
PLCC
ad8/d0/p1.0
38
ad9/d1/p1.1
37
ad10/d2/p1.2
36
ad11/d3/p1.3
35
ad12/d4/p1.4
34
ad13/d5/p1.5
33
ad14/d6/p1.6
32
ad15/d7/p1.7
31
Description
QFP
32 ^{port 1, bit N (N = 7–0). Input/Output (general-purpose). Mode 0,}
Mode 2, and Serial Interface Mode.
Port 1 bits p1.7–p1.0 can be individually programmed as inputs or
outputs. Programming is accomplished by writing to the P1CONF
31 _{Register (9FH). The 8 bits of the P1CONF Register, P1CONF7–}
P1CONF0, correspond directly to pins p1.7–p1.0. Writing a 0 to a bit
in the P1CONF Register causes the corresponding pin to be
30 _{configured as a high-impedance input. Writing a 1 to a bit in the}
P1CONF Register causes the corresponding pin to be configured as
a push-pull output. All Port 1 pins have weak pull-ups until the port is
29 configured by writing to the P1CONF Register. The default value of
the P1CONF Register following a reset is 00H.
28 ^{Data are read from Port 1 via the P1IN Register (BFH). A logic 0 for}
any bit in this register means that a logic 0 was read from the
corresponding pin; a logic 1 for any bit means that a logic 1 was read
27 ^{from the corresponding pin. The default value of the P1IN Register}
following a reset is FFH.
26
Data are written to Port 1 via the P1OUT Register (DFH). Writing a
logic 0 to any bit in this register means that a logic 0 is written to the
corresponding pin; writing a logic 1 to any bit means that a logic 1 is
written to the corresponding pin. The default value of the P1OUT
25 _{Register following a reset is 00H.}
p2.0
—
p2.1
—
p2.2
—
p2.3
—
p2.4
—
p2.5
—
p2.6
int_n/p2.6
p2.7
wrh_n/p2.7
Copyright  2007
©
17
11 _{port 2, bit N (N = 7–0). Input/Output.}
Port 2 bits p2.7–p2.0, can be individually programmed as inputs or
outputs. Programming is accomplished by writing to the P2CONF
16
10 _{Register (AFH). The 8 bits of the P2CONF Register, P2CONF7–}
P2CONF0, correspond directly to pins p2.7–p2.0. Writing a 0 to a bit
in the P2CONF Register causes the corresponding pin to be
15
9 configured as a high-impedance input. Writing a 1 to a bit in the
P2CONF Register causes the corresponding pin to be configured as
a push-pull output. All Port 2 pins have weak pull-ups until the port is
14
8
configured by writing to the P2CONF Register. The default value of
the P1CONF Register following a reset is 00H.
Data are read from Port 2 via the P2IN Register (CFH). A logic 0 for
13
7 _{any bit in this register means that a logic 0 was read from the}
corresponding pin; a logic 1 for any bit means that a logic 1 was read
from the corresponding pin. The default value of the P2IN Register
12
6 following a reset is FFH.
Data are written to Port 2 via the P2OUT Register (EFH). Writing a
11
5 ^{logic 0 to any bit in this register means that a logic 0 is written to the}
corresponding pin; writing a logic 1 to any bit means that a logic 1 is
written to the corresponding pin. The default value of the P2OUT
10
4
Register following a reset is 00H.
EN21070504-00
Page 14 of 45
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