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| TC1115 Datasheet, PDF (92/103 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller Advance Information | |||
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Advance Information
TC1115
Electrical Parameters
BFCLKO /
S DCLK O
0.5 VDD
t2
t3
t5
t1
Figure 4-9 EBU Clock Output Timing
4.3.8.3 Timing for SDRAM Access Signals
(Operating Conditions apply; CL = 50 pF1))
Parameter
SDCLKO period
CKE output valid time from SDCLKO
CKE output hold time from SDCLKO
Address output valid time from SDCLKO
Address output hold time from SDCLKO
CSx, RAS, CAS, RD/WR, BC(3:0) output
valid time from SDCLKO
CSx, RAS, CAS, RD/WR, BC(3:0) output
hold time from SDCLKO
AD(31:0) output valid time from SDCLKO
AD(31:0) output hold time from SDCLKO
AD(31:0) input setup time to SDCLKO
AD(31:0) input hold time from SDCLKO
Symbol Limits2) Limits3) Unit
min max min max
t1 CC 10 â 8.3 â ns
t1 CC â 8.0 â 6.8 ns
t2 CC 0 â 0.8 â ns
t3 CC â 8.0 â 6.8 ns
t4 CC 1.0 â 0.8 â ns
t5 CC â 8.0 â 6.8 ns
t6 CC 1.0 â 0.8 â ns
t7 CC â 8.0 â 6.8 ns
t8 CC 1.0 â 0.8 â ns
t9 SR 4.0 â 2.9 â ns
t10 SR 3.0 â 3.0 â ns
1) If application conditions other than 50 pf capacitive load are used, then the proper correlation factor should be
used for your specific application condition. For design team, the load should be set according to the system
requirement.
2) The parameters are applicable for PC100 SDRAM access and the maximum SDCLKO is up to 100 MHz.
3) The parameters are applicable for PC133 SDRAM access and the maximum SDCLKO is up to 120 MHz.
Data Sheet
86
V1.0, 2005-02
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