TC1115 Datasheet, PDF (36/103 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller Advance Information

TC1115
Advance Information
Functional Description
The EBU is used primarily for any Local Memory Bus (LMB) master accessing external
memories. The EBU controls all transactions required for this operation and in particular
handles the arbitration between the internal EBU master and the external EBU master.
The types of external devices/bus modes controlled by the EBU are:
• Intel-style peripherals (separate RD and WR signals)
• ROMs, EPROMs
• Static RAMs
• PC100 and PC133 SDRAMs (Burst Read/Write Capacity/Multi-Bank/Page support)
• Specific types of Burst Mode Flash devices
• Special support for external emulator/debug hardware
Features:
• Supports 64-bit Local Memory Bus (LMB)
• Supports external bus frequency: internal LMB frequency = 1:1 or 1:2
• Provides highly programmable access parameters
• Supports Intel-style peripherals/devices
• Supports PC100 and PC133 (runs in maximum 120 MHz) SDRAM (burst access,
multibanking, precharge, refresh)
• Supports 16- and 32-bit SDRAM data bus and 64-,128-, and 256-Mbit devices
• Supports Burst Flash devices
• Supports Multiplexed access (address and data on the same bus) when PC100 and
PC133 SDRAM are not presented on the external bus
• Supports data buffering: Code Prefetch Buffer, Read/Write Buffer
• External master arbitration compatible to C166 and other TriCore™ devices
• Provides 4 programmable address regions (1 dedicated for emulator)
• Provides a CSGLB signal, bit programmable to combine one or more CS lines for
buffer control
• Provides RMW signal reflecting read-modify-write action
• Supports Little Endian byte ordering
• Provides signal for controlling data flow of slow-memory buffer
Data Sheet
30
V1.0, 2005-02