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XC2723X Datasheet, PDF (7/109 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance | |||
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XC2723X
XC2000 Family / Econo Line
Summary of Features
16/32-Bit Single-Chip Microcontroller
with 32-Bit Performance
XC2723X (XC2000 Family)
1
Summary of Features
For a quick overview and easy reference, the features of the XC2723X are summarized
here.
⢠High-performance CPU with five-stage pipeline and MPU
â 12.5 ns instruction cycle @ 80 MHz CPU clock (single-cycle execution)
â One-cycle 32-bit addition and subtraction with 40-bit result
â One-cycle multiplication (16 Ã 16 bit)
â Background division (32 / 16 bit) in 21 cycles
â One-cycle multiply-and-accumulate (MAC) instructions
â Enhanced Boolean bit manipulation facilities
â Zero-cycle jump execution
â Additional instructions to support HLL and operating systems
â Register-based design with multiple variable register banks
â Fast context switching support with two additional local register banks
â 16 Mbytes total linear address space for code and data
â 1,024 Bytes on-chip special function register area (C166 Family compatible)
â Integrated Memory Protection Unit (MPU)
⢠Interrupt system with 16 priority levels providing 64 interrupt nodes
â Selectable external inputs for interrupt generation and wake-up
â Fastest sample-rate 12.5 ns
⢠Eight-channel interrupt-driven single-cycle data transfer with
Peripheral Event Controller (PEC), 24-bit pointers cover total address space
⢠Clock generation from internal or external clock sources,
using on-chip PLL or prescaler
⢠Hardware CRC-Checker with Programmable Polynomial to Supervise On-Chip
Memory Areas
⢠On-chip memory modules
â 2 Kbytes on-chip dual-port RAM (DPRAM)
â 6 Kbytes on-chip data SRAM (DSRAM)
â 4 Kbytes on-chip program/data SRAM (PSRAM)
â Up to 160 Kbytes on-chip program memory (Flash memory)
â Memory content protection through Error Correction Code (ECC) for Flash
memory and through parity for RAMs
Data Sheet
3
V1.2, 2012-07
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