PXB4360F Datasheet, PDF (63/66 Pages) Infineon Technologies AG – ICs for Communications

3;%  )
(OHFWULFDO &KDUDFWHULVWLFV
7DEOH  3DUDPHWHUV IRU 5HDG:ULWH $FFHVV
1R
3DUDPHWHU
PLQ
1
CLK frequency
0.01
2
CLK duty cycle
40
3
Set up time of CS, WE, ADR and DAT in 4
read and write cycle to CLK ↑
4
Hold time of CS, WE, ADR and DAT in 4
read and write cycle from CLK ↑
5a¹⁾
Data access of DAT in read cycle from
CLK ↑ (32-bit access)
5b¹⁾
Data access of DAT in read cycle from
CLK ↑ (16-bit access)
6
Data hold of DAT in read cycle from 4
CLK ↑
7
OE low of DAT in read cycle to Output
active
8
OE high of DAT in read cycle to Output Z
1) _{The ALP PXB 4350 E uses only the 16-bit access}
/LPLW 9DOXHV
W\S
PD[
25.92
60
35
19
21
21
 $& &KDUDFWHULVWLFV RI &$0( &DVFDGH ,QWHUIDFH
8QLW
MHz
%
ns
ns
ns
ns
ns
ns
ns
CLK
CO(2:0)
CI(2:0)
Transfer of status information
1
2
2
valid
3
4
valid
)LJXUH  7LPLQJ RI &DVFDGH ,QWHUIDFH
Data Sheet
7-63
07.2000