PXB4360F Datasheet, PDF (36/66 Pages) Infineon Technologies AG – ICs for Communications

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6
S3 / S2 :S1/S0
00
Ok
01
Busy
10
Alarm
00
01
10
00
01
00
11
Error
00
01
10
Command was executed without problems.
Indication in S1/S0:
S1/S0 = 0/0.
Command execution is still in progress.
Indication in S1/S0:
S1/S0 = 0/0.
Operation was not successful for CAME memory content
dependent reasons. Indication in S1 / S0:
Mismatch (at search requests #1..3).
The search pattern was not found in any line. The LCI returned
is invalid (01FF_H).
Multimatch (at search requests #1..3).
The search pattern was found in more than one line. The LCI
of the lowest matching line is returned.
Test search fault (at search requests #1..3).
After “test search,” the search pattern was not found in all 16
blocks at the same line offset and nowhere else. The LCI
returned is invalid.
Refused entry (at write request #4).
Attempt to write an entry to CAME which is already stored in a
line of this chip (or the second CAME). This mode can be
activated with MODE register bit CEE.
Refused line (at write request #4).
Attempt to write a valid entry in a line already containing valid
information. This mode can be activated with MODE register
bit CLE.
Test read fault (at read request #5).
The contents read from all 16 blocks at the same line offset
were not equal. The read result returned is invalid.
A hardware error was detected.
Indication in S1 / S0:
Data bus parity error.
Cascade error.
Command cycle error.
Data Sheet
5-36
07.2000