PXB4360F Datasheet, PDF (49/66 Pages) Infineon Technologies AG – ICs for Communications

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Mismatch
Single Match
Multimatch
Master.CO(1..0) = 00 Master.CO(1..0) = 01 Master.CO(1..0) = 01
Mismatch
Master: Mismatch
Slave.CO(1..0) = 00 Slave: inactive
Single Match
Master: inactive
Slave.CO(1..0) = 01 Slave: Single Match
Multimatch
Master: inactive
Slave.CO(1..0) = 01 Slave: Multimatch
Master: Single Match Master: Multimatch
Slave: inactive
Slave: inactive
Master: Multimatch
Slave: inactive
Master: Multimatch
Slave: inactive
Master: Multimatch
Slave: inactive
Master: Multimatch
Slave: inactive
In summary, the condition for the CAME to become active at the end of an error-free search
cycle is:
If the Slave receives 00 for “Mismatch” on CI(1..0) and recognizes an internal “Single Match” or
“Multimatch” condition it may respond to the master; it must not respond in all other cases.
A master will not respond at the end of the current command cycle only if it detects an internal
“Mismatch” condition and the slave reports at CI(1..0) with 01 no “Mismatch”; in all other cases
the master responds.
In the case of a communication fault at the beginning of a request, the determination of which
chip may respond is not performed. The reason may be a parity error. To avoid bus conflicts, the
slave always must be controlled by the master chip for data output in case of reading. This is
done by the master with the CO(2) signal.
If the slave outputs the codes 10 (no request processed) or 11 (request #4..6 processed) at
CO(1..0) while the master processes a search request, the overall status “cascade error” is
reported by the master.
If the master processes one of the requests without searching, then only if the slave outputs the
code 10 (no request processed) is the overall status “cascade error”. In the other cases, no error
is recognized. The code 00 from a slave is accepted intentionally, even if it pretends a search
operation, because, for non-cascaded applications, the CI(2..0) inputs are connected to ground.
Finally, if the master holds the internal status “data bus parity error” or “command cycle error,”
no request is processed by the master. In this case, the slave status is ignored.
This behavior is summarized in WDEOH . The master will always report the cascade, parity, and
command cycle errors.
Data Sheet
6-49
07.2000