PXB4360F Datasheet, PDF (32/66 Pages) Infineon Technologies AG – ICs for Communications

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5HJLVWHUV
 5HDG 'DWD 5HJLVWHU
These registers contain a complete entry consisting of PN/VPI/VCI, the P_IP flag and the VCON
flag. The read data contained in the CAME memory line, selected with the DLCI register
contents, is transferred to these registers. At the end of a read request #5, the ALP can read the
resulting data from the RPN,RVPI,RVCI,RI,RV registers.
Read Address 1_H, 6_H, 9_H
Value after reset undefined

PN(3:0)



VPI(7:0)
VCI(15:8)
VCI(7:0)

VCON
VPI(11:8)

P_IP




16-Bit Mode request 5:
32-Bit Mode request 5:
1_H for PN(3:0), VPI(11:0)
6_H for VCON, P_IP
9_H for VCI(15:0)
1_H for PN(3:0), VPI(11:0), VCI(15:0)
6_H for VCON, P_IP
9&21
Valid Connection flag:
0
Connection not valid.
1
Connection valid.
3B,3
Path Intermediate Point flag:
0
Address reduction is performed over PN / VPI / VCI.
1
Path Intermediate Point; address reduction is performed only over
PN / VPI.
Data Sheet
5-32
07.2000