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TLE82453-3SA_15 Datasheet, PDF (54/71 Pages) Infineon Technologies AG – 3 Channel High-Side and Low-Side Linear Solenoid Driver IC
TLE82453-3SA
SPI Registers
12.3
CONFIGURATION REGISTER
CONFIG
Configuration Register
Reset Value: 0100 000xH
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R/W 0
0
0
0
0
0
1
not used
15 14 13 12 11
IDIAG IDIAG IDIAG
2
1
0
SR2
10
9
SR1
8
7
6
5
4
3
2
1
0
SR0
FME FM2 FM1 FM0 HL2 HL1 HL0
Field
Bits
R/W
31
IDIAG0-2 15:13
SR0-2
12:7
FME
6
FM0-2
5:3
HL0-2
2:0
Type
rw
rw
rw
rw
rw
r
Description
Read / Write bit
0 = Read
1 = Write
When reading this register, the R/W bit is 0
Set Off State Diagnostic current
0 = High-Side current source is active (Reset value)
1 = Low-Side current source is active
Set slew rate setting of channel
00 = Set the channel slew rate to SR0 (Reset value)
01 = Set the channel slew rate to SR1
10 = Set the channel slew rate to SR2
11 = Ignored (previous setting is used)
Set Fault Mask for EN pin
0 = EN pin state does not influence the FAULTN pin (Reset value)
1 = FAULTN pin is driven low if the EN pin is low.
Set Fault Mask for channel
0 = Channel faults do not influence the FAULTN pin (Reset value)
1 = FAULTN pin is driven low when a fault is detected on the channel
HSLS2, HSLS1, and HSLS0 pin status (Reset value = state of
HSLS pins)
0 = Highside configuration
1 = Lowside configuration
Data Sheet
-
54
Rev 1.0, 2015-03-27