TLE82453-3SA_15 Datasheet, PDF (52/71 Pages) Infineon Technologies AG – 3 Channel High-Side and Low-Side Linear Solenoid Driver IC

12
SPI Registers
TLE82453-3SA
SPI Registers
12.1
Description of Protocol
For each command received at the SI pin of the SPI interface, a serial data stream is returned at the same time
on the SO pin. The content of the SO dat
a frame is dependent on the command which was received on the SI pin during the previous frame. A READ
command (R/W = 0) returns the contents of the addressed register one SPI frame later. The data bits in the READ
command are ignored. A WRITE command (R/W = 1) will write the databits in the SPI word to the addressed
register. The actual contents of that register will be returned to the SPI master (microcontroller) during the next
SPI frame. The response is not an echo of the data received from the SI pin, it is the actual contents of the register
addressed in the previous SPI frame.
CSN
SI
R Message #1
W Message #2
R Message #3
SO
Response #1
Response #2
Figure 36 SPI Protocol
Each SPI message for the TLE82453-3SA has a length of 32 bit. The message from the microcontroller must be
sent MSB first. The data from the SO pin is sent MSB first.
The response to an invalid SPI message is the IC Version and Manufacturer ID register (ICVID).
The SO data in the frame immediately following a reset condition is the IC Version and Manufacturer ID (ICVID)
register.
Data Sheet
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52
Rev 1.0, 2015-03-27