TLE82453-3SA_15 Datasheet, PDF (50/71 Pages) Infineon Technologies AG – 3 Channel High-Side and Low-Side Linear Solenoid Driver IC

11
Serial Peripheral Interface (SPI)
TLE82453-3SA
Serial Peripheral Interface (SPI)
11.1
Description of Interface
The diagnosis and control communication interface is based on the standard serial peripheral interface (SPI). The
SPI is a full duplex synchronous serial slave interface which uses four signal lines: SO, SI, SCK, and CSN. Data
is transferred by the lines SI and SO at the data rate given by SCK. The falling edge of CSN indicates the beginning
of a data access. Data is sampled in on line SI at the falling edge of SCK and shifted out on line SO at the rising
edge of SCK. Each access must be terminated by a rising edge of CSN. A counter ensures that data is taken only
when 32 bits have been transferred. If in one transfer cycle the number of bits transferred is not 32, the data frame
is ignored
SO
SI
CSN
SCLK
time
MSB 30 29 28 27 26
MSB 30 29 28 27 26
8
7
6
5
4
3
2
1
LSB
8
7
6
5
4
3
2
1
LSB
Figure 34 SPI Interface Signal Overview
11.2
Timing Diagrams
CS
t_{CSN( le a d )}
SCLK
SI
t_SO(en)
SO
t_SCLK(P)
t_SCLK(H) t_SCLK(L)
t_SI(su)
t_SI(h)
t_SO(v)
Figure 35 SPI Signal Timing Diagram - Thresholds = 20% / 80%
t_{CSN( la g )}
t_{CSN( td )}
t_SO(dis)
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
Data Sheet
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50
Rev 1.0, 2015-03-27