TLE82453-3SA_15 Datasheet, PDF (17/71 Pages) Infineon Technologies AG – 3 Channel High-Side and Low-Side Linear Solenoid Driver IC

TLE82453-3SA
Power Supply
The fault bit “RST” in the DIAGNOSIS register is set whenever the device exits the reset state. This bit is cleared
automatically whenever the DIAGNOSIS register is accessed. The microcontroller can use this bit to determine if
an internal or external reset has occurred.
6.8
Charge Pump
In order to provide low Rdson of the high-side mosfet transistors, a charge pump is used to drive the internal gate
voltage above VBAT. The device uses a common charge pump for all channels. The charge pump uses the battery
voltage supply connected to the VBAT pin. The charge pump output voltage at the CPOUT pin is regulated to
typically 11V above the voltage at the VBAT pin.
The charge pump circuit requires three external capacitors. A reservoir capacitor with a recommended value of
220nF must be connected between the CPOUT pin and the VBAT pin. Two pump capacitors with recommended
values of 27nF must be connected between the CPC1L and CPC1H pins and also between the CPC2L and
CPC2H pins. A built in supervisor circuit checks if the charge pump output voltage is sufficient to control the high-
side mosfet transistors. If the VCPOUT voltage is less than the charge pump undervoltage threshold, the output
transistors are disabled and the CPUV fault flag is set in the DIAGNOSIS register. A separate CPW (Charge Pump
Warning) fault bit in the DIAGNOSIS register is set if the VCPOUT voltage is below the CP warning threshold
voltage. The device will continue to operate normally when the VCPOUT voltage is between the CPW threshold
and the CPUV threshold, however the current control accuracy may be outside of the specification limits.
6.9
Sleep Mode
If any one of the VDDD, VDDA, and VDDAREF voltage supplies is below the respective undervoltage threshold,
the device enters sleep mode. The current drawn into the VBAT pin is reduced during this mode of operation.
Sleep mode is automatically exited when all of the VDDD, VDDA, and VDDAREF supply pins are above the
respective undervoltage threshold. The sleep mode has the same effect as a reset and follows the Initialization
Sequence.
6.10
Power Supply Modes
The following table describes the operation of the device with all possible power supply modes of VBAT, VCPOUT,
VDDD, VDDA, VDDAREF, and VIO. The “X” symbol means that the state of this supply does not effect the result
(can be either supplied or not supplied) in the specific case.
Data Sheet
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Rev 1.0, 2015-03-27