TLE82453-3SA_15 Datasheet, PDF (40/71 Pages) Infineon Technologies AG – 3 Channel High-Side and Low-Side Linear Solenoid Driver IC

TLE82453-3SA
Diagnosis Functions
10.3
FAULT mask bits
The CONFIGURATION register includes fault mask bits which can be used to allow or prevent a fault from
activating the FAULTN pin. Setting the FME bit to 1 will cause the FAULTN pin to be held low whenever the EN
pin is low. If the FME bit is set to 0, the FAULTN pin is not affected by the state of the EN pin voltage. Setting the
FMx bit to 1 will cause the FAULTN pin to be held low whenever a OTx, OVCx, UVx, or OLSBx fault is detected
on the respective channel. If the FMx bit is set to 0, the state of the OTx, OVCx, UVx, and OLSBx fault bits will not
affect the state of the FAULTN pin.
10.4
Overcurrent fault
The device is protected from a short across the load by an overcurrent shutdown feature when the channel is
enabled and the setpoint is >0. When a fault is detected the EN bit is set to 0, the setpoint is cleared to 0 and the
overcurrent fault bit OVCx is set. The channel will remain disabled until the diagnostic register is read and the EN
bit is set back to 1 and the setpoint is set to >0. When an overcurrent fault is detected, the OVCx fault bit is latched.
The fault bit is cleared when the DIAGNOSIS register is read. The functional range for the short circuit detection
depends on the setpoint and the PWM period.
Load
State
NORMAL LOAD
SHORT TO BATTERY
NORMAL LOAD
ILOADx
VLOADx
OVCx
CSN
SI
SO
FAULTN
(FMx = 1)
DIAG-
NOSIS
DIAG-
NOSIS
OVCx
=0
TOC
TOC
DIAG- DIAG-
NOSIS NOSIS
DIAG- DIAG-
NOSIS NOSIS
OVCx OVCx
=1
=0
I > 0ma
I > 0ma
DIAG- DIAG-
NOSIS NOSIS
DIAG- DIAG-
NOSIS NOSIS
OVCx OVCx
=1
=0
Figure 20 Overcurrent Fault in Low-Side Configuration
10.5
Open Load / Switch Bypass Fault
An open load fault and a switch bypass fault can be detected, but not distinguishable, via the OLSB bit alone. An
OLSB fault can be detected when the setpoint of the faulted channel is equal to 0 mA (channel off) or when the
setpoint is greater than 0 mA (channel operating). While the output is off, both faults can be distinguished using
the OLOFF bit. The switch bypass fault is a short to battery fault when the channel is configured as a high-side
driver and a short to ground when the channel is configured as a low-side driver.
The device detects an open load or switch bypass fault in the operating condition by monitoring the load current.
If the load current is below the OLSB threshold current for a time greater than the OLSB delay time (on state), then
the OLSBx fault bit is set and the channel is disabled. The OLSBx fault bit is latched when the fault occurs, and it
is cleared when the DIAGNOSIS register is read and the fault is no longer present. The channel will remain
disabled until the diagnostic register is read and the EN bit is set back to 1 and the setpoint is set to >0. Additional
information can be found in the Diagnostic and Protection functions applications note.
Data Sheet
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40
Rev 1.0, 2015-03-27