ICB2FL03G Datasheet, PDF (25/60 Pages) Infineon Technologies AG – 2nd Generation FL Controller for Fluorescent Lamp Ballasts

ICB2FL03G
Controller for Fluorescent Lamp Ballasts
Functional Description
2.4.3 PFC Structure of Mixed Signals
A digital NOTCH filter eliminates the input voltage ripple independently of the mains frequency. A subsequent error
amplifier with PI characteristic ensures stable operation of the PFC preconverter (Figure 16).
Over Voltage
109%
PFCVS
Σ∆-ADC
Open Loop
12.5%
Notch Filter
PI Loop Control
PWM
Gate Drive
PFCGD
Under Voltage
75%
Bus Voltage
95%
Int. Reference
VPFCVS = 2.5 V
Over Current
1V ± 5.0%
ZCD Start Up
1.5V / 0.5V
THD
Correction
Clock 870 kHz
PFCCS
PFCZCD
Figure 16 Structure of the Mixed Digital and Analog Control of the PFC Preconverter
The zero current detection (ZCD) is sensed by the PFCZCD pin via R13 (Figure 3). Notification of finished current
flow during demagnetization is required in CritCM and in DCM also. The input is equipped with a special filtering
system, including blanking of typically 500 ns and a large hysteresis of typically 0.5 V and 1.5 V V_PFCZCD
(Figure 16).
2.4.4 THD Correction via ZCD Signal
An additional feature is the THD correction (Figure 16). In order to optimize the improved THD (especially in the
zones A shown in Figure 17 ZCD @ AC Input Voltage), there is a possibility to extend the pulse width of the gate
signal (blue part of the PFC gate signal in Figure 17) with the variable PFC ZCD resistor (see resistor R13 in
Figure 3) in addition to the gate signal controlled by the V_PFCVS signal (gray part of the PFC gate signal in
Figure 17).
Final Data Sheet
25
V1.1, 2013-08-14