ICB2FL03G Datasheet, PDF (11/60 Pages) Infineon Technologies AG – 2nd Generation FL Controller for Fluorescent Lamp Ballasts

ICB2FL03G
Controller for Fluorescent Lamp Ballasts
Pin Configuration and Functionality
GND (ground, pin 4)
This pin is connected to ground and represents the ground level of the IC for supply voltage, gate drive and sense
signals.
PFCGD (PFC gate drive, pin 5)
This pin controls the gate of the MOSFET in the PFC preconverter designed in boost topology. There is an active
L-level during UVLO and limitation of the max H-level at 11.0 V during normal operation. In order to turn on the
MOSFET softly (with a reduced di_DRAIN/dt), the gate drive voltage rises within 245 ns from L-level to H-level. The
fall time of the gate voltage is less than 50 ns in order to turn off quickly.
A resistor of typically 10 Ω between the drive pin and gate is recommended in order to avoid oscillations and in
order to shift the power dissipation of discharging the gate capacitance into this resistor.
The PFC section of the IC controls a boost converter as a PFC preconverter in discontinuous conduction mode
(DCM). Control usually starts with gate drive pulses with a fixed on-time of typically 4.0 μs at V_ACIN = 230 V,
increasing up to 24 μs and with an off-time of 47 μs. As soon as sufficient zero current detector (ZCD) signals are
available, the operation mode changes from fixed frequency operation to operation with variable frequency. The
PFC works in critical conduction mode operation (CritCM) when rated and / or medium load conditions are present.
This means triangular-shaped currents in the boost converter choke without gaps and variable operating
frequency. During low loads (detected by an internal compensator) operation is in discontinuous conduction mode
(DCM) – i.e., triangular-shaped currents in the boost converter choke with gaps when reaching the zero current
level and variable operating frequency in order to avoid steps in the consumed line current.
PFCCS (PFC current sense, pin 6)
The voltage drop across a shunt resistor located between the source of the PFC MOSFET and GND is sensed
with this pin. If the level exceeds a threshold of 1.0 V for longer than 200 ns, the PFC gate drive is turned off as
long as the zero current detector (ZCD) enables a new cycle. If no ZCD signal is available within 52 μs after turn-off
of the PFC gate drive, a new cycle is initiated from an internal start-up timer.
PFCZCD (PFC zero current detector, pin 7)
This pin senses the point of time when the current through boost inductor becomes zero during off-time of the PFC
MOSFET in order to initiate a new cycle.
The moment of interest appears when the voltage of the separate ZCD winding changes from the positive to
negative level, which represents a voltage of zero at the inductor windings and therefore the end of current flow
from the lower input voltage level to the higher output voltage level. There is a threshold with hysteresis – for
increasing level 1.5 V, for decreasing level 0.5 V – which detects the change in inductor voltage.
A resistor, connected between ZCD winding and pin 7, limits the sink and source current of the sense pin when
the voltage of the ZCD winding exceeds the internal clamping levels (6.3 V and -2.9 V typically @ 5 mA) of the IC.
If the sensed voltage level of the ZCD winding is not sufficient (e.g. during start-up), an internal start-up timer will
initiate a new cycle every 52 μs after turn-off of the PFC gate drive. The source current flowing out of this pin during
the on-time of the PFC-MOSFET indicates the voltage level of the AC supply voltage. During low input voltage
levels the on-time of the PFC-MOSFET is increased in order to minimize gaps in the line current during zero
crossing of the line voltage and improve the THD (Total Harmonic Distortion) of the line current. Optimization of
the THD is possible by trimming of the resistor between this pin and the ZCD winding.
PFCVS (PFC voltage sense, pin 8)
The intermediate circuit voltage (bus voltage) at the smoothing capacitor is sensed by a resistive divider at this
pin. The internal reference voltage for rated bus voltage is 2.5 V. There are further thresholds at 0.3125 V (12.5 %
of the rated bus voltage) for the detection of open control loop, at 1.875 V (75 % of the rated bus voltage) for the
detection of undervoltage, and at 2.725 V (109 % of the rated bus voltage) for the detection of overvoltage. The
Final Data Sheet
11
V1.1, 2013-08-14